PTAB

IPR2018-01429

Intel Corp v. Qualcomm Inc

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Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Stepped Gain Mixer
  • Brief Description: The ’043 patent discloses a radio frequency (RF) receiver circuit, specifically an amplified stepped gain mixer. The design uses multiple parallel transistors and a switch to selectively combine their outputs, thereby providing multiple gain states to achieve a high signal-to-noise ratio over a large gain control range.

3. Grounds for Unpatentability

Ground 1: Claims 1, 17, 19, and 21 are anticipated by Der.

  • Prior Art Relied Upon: Der (“A 2-GHz CMOS Image-Reject Receiver with LMS Calibration,” a 2003 IEEE Journal of Solid-State Circuits article).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Der disclosed every element of independent claims 1 and 17. Der’s receiver architecture was presented as a "device" with a low-noise amplifier (LNA) having an output lead. Petitioner mapped Der’s transistors M4 and M3A to the claimed "first transistor" and "second transistor," respectively, noting both have source, drain, and gate leads. The LNA output in Der was shown to be coupled to the source leads of both transistors M4 and M3A. Der’s transistor M9 was identified as the claimed "switch," which couples the drain leads of the first and second transistors when closed. Finally, Petitioner asserted that Der disclosed an "oscillating signal" (VLO+) from a local oscillator present on the gate leads of both transistors. Dependent claims 19 (switch is a transistor) and 21 (receiving an oscillator signal) were argued to be inherently disclosed by the same teachings.

Ground 2: Claims 2, 3, and 7 are obvious over Der in view of Razavi.

  • Prior Art Relied Upon: Der (a 2003 IEEE Journal of Solid-State Circuits article) and Razavi (a 1998 textbook titled RF Microelectronics).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground built upon the teachings of Der from Ground 1. For claim 2, Petitioner contended that while Der discloses a receiver for a wideband CDMA system, which would inherently use an antenna, Razavi explicitly taught coupling an LNA to an antenna in a typical RF receiver block diagram. For claim 3, Petitioner argued that using filters on mixer outputs was notoriously well known, and Razavi’s generalized receiver architecture showed a low-pass filter coupled to the output of the second mixer stage. For claim 7, Petitioner argued that Der’s receiver was for wireless cellular systems (WCDMA), and Razavi taught that such systems implement various modulation techniques. A POSITA would have found it obvious to use the combined Der/Razavi receiver in an Orthogonal Frequency-Division Multiplexing (OFDM) system, as OFDM was a widely known modulation technique for wireless communications.
    • Motivation to Combine: A POSITA would combine Der and Razavi to implement Der’s specific, advantageous mixer circuit within the generalized, well-understood cellphone RF architecture provided by Razavi. The combination was presented as a simple substitution of a known element (Der's mixer) into a known system (Razavi's receiver) to achieve the predictable benefit of Der's improved gain control within a standard cellphone design.
    • Expectation of Success: Success was expected because the combination involved applying a specific mixer design (Der) into a standard receiver architecture (Razavi) according to well-established design principles to yield a predictable improvement in receiver performance.

Ground 3: Claims 1-3, 6, 7, 17-19, and 21 are obvious over Valla in view of Der.

  • Prior Art Relied Upon: Valla (“A 72-mW CMOS 802.11a Direct Conversion Front-End,” a 2005 IEEE Journal of Solid-State Circuits article) and Der (a 2003 IEEE Journal of Solid-State Circuits article).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued Valla, a direct conversion receiver, disclosed a passive mixer with an LNA (amplifier) and a first mixing transistor. However, Valla’s passive mixer design did not include a second parallel transistor with a switch for stepped gain control. Petitioner asserted that Der supplied this missing element with its disclosure of a variable-gain mixer using two parallel transistor paths whose outputs are selectively combined by a switch-based gain control block. The combination would result in a device meeting all limitations of the challenged claims, including the passive, non-biased nature of the transistors recited in claim 6.
    • Motivation to Combine: A POSITA would combine the references to gain the benefits of both technologies. Valla’s passive mixer architecture offered low noise, high linearity, and low power consumption. Der’s parallel mixer with switched gain control offered precise gain adjustment without altering signal phase. A POSITA would have been motivated to modify Valla’s circuit by adding a parallel mixer path and gain control block as taught by Der to achieve the improved dynamic range and performance from Der’s gain control while retaining the power and noise advantages of Valla’s passive design.
    • Expectation of Success: A POSITA would have had a high expectation of success because combining the passive mixer topology of Valla with the parallel gain control architecture of Der involved routine design modifications, such as replicating a mixer circuit and adding a small number of transistors for the gain control switch, based on well-known engineering principles.

4. Key Claim Construction Positions

  • "oscillating signal": Petitioner proposed this term, found in claim 1, should be construed to mean "a signal that periodically moves between two values." This construction was argued to be consistent with the plain and ordinary meaning and the patent’s specification, which described the signal as being generated by a frequency synthesizer or local oscillator. This construction was important for mapping the local oscillator (LO) signals in the prior art references to this claim limitation.

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-3, 6-7, 17-19, and 21 of the ’043 patent as unpatentable.