PTAB

IPR2018-01482

Everlight Electronics Co Ltd v. Bridgelux Inc

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1. Case Identification

2. Patent Overview

  • Title: High power AlInGaN Based Multi-chip Light Emitting Diode
  • Brief Description: The ’812 patent discloses a light-emitting diode (LED) chip designed with a rectangular shape, defined by an active area aspect ratio greater than 1.5:1, instead of a conventional square shape. This elongated geometry is intended to improve light output efficiency and heat dissipation by shortening the average path photons must travel to escape the chip.

3. Grounds for Unpatentability

Ground 1: Claims 1-3, 7-10, 17-21, and 32 are anticipated by Baur under 35 U.S.C. §102.

  • Prior Art Relied Upon: Baur (WO 02/15287).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Baur discloses every limitation of the anticipated claims. Baur is directed to high-performance LEDs made from semiconductor chips with longitudinal sides substantially longer than their transverse sides, explicitly for the purpose of improving light extraction and radiation yield. Baur discloses specific examples with aspect ratios of 9.5:1 and 10:1, which inherently satisfy the claimed "> 1.5:1" ratio of independent claim 1. Petitioner further contended that Baur teaches all other key elements, including a substantially transparent substrate (e.g., silicon carbide), an active region formed upon that substrate, and the assembly of these chips into a packaged "LED lamp," thereby anticipating both the base chip claims (1-3, 7-10) and the lamp claims (17-21, 32).

Ground 2: Claims 4 and 5 are obvious over Baur in view of Singer.

  • Prior Art Relied Upon: Baur (WO 02/15287) and Singer (Patent 5,813,752).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that claims 4 and 5 recite specific values that fall within a range of known, obvious values taught by the prior art. Claim 4 recites an aspect ratio of "approximately 4 to 1," and claim 5 recites dimensions of "approximately 250 microns" by "1000 microns." Baur teaches a range of aspect ratios from 1:1 up to 10:1, and Singer teaches an aspect ratio of "2 or more." The claimed 4:1 ratio falls predictably within this known range. Likewise, Baur teaches starting with a 250-micron width and lengthening the chip up to 2250 microns, making the 1000-micron length of claim 5 an obvious intermediate dimension.
    • Motivation to Combine: A POSITA would be motivated to select a particular aspect ratio within the known range taught by Baur and Singer to optimize the trade-off between known benefits—improved light extraction and thermal conductivity—and the specific size constraints of a given application. The choice was presented as a simple and predictable design parameter, not an inventive step.
    • Expectation of Success: A POSITA would have a high expectation of success in selecting a value within a disclosed range. This would be a routine design choice with predictable results in adjusting chip performance and size, not requiring any undue experimentation or overcoming any technical hurdles.

Ground 3: Claims 22-25 and 28-30 are obvious over Baur in view of Bhat.

  • Prior Art Relied Upon: Baur (WO 02/15287) and Bhat (Patent 6,885,035).

  • Core Argument for this Ground:

    • Prior Art Mapping: Petitioner asserted that Baur anticipates the base lamp claim 17, which includes a plurality of LED chips in a package, but does not specify how they are electrically connected. The challenged dependent claims add limitations for connecting the chips electrically in series (claim 22), in parallel (claim 23), or in a combination thereof (claim 24), including specific embodiments with four chips (claims 25, 28-30). Bhat was cited as explicitly teaching these exact three methods for electrically connecting multiple LEDs within a single assembly.
    • Motivation to Combine: A POSITA designing a multi-chip lamp as taught by Baur would naturally turn to well-known circuit design principles to power the chips. Bhat provided an express motivation for using its connection schemes: to adapt multiple low-voltage LED chips to operate with different standard power source voltages (e.g., a 12V automotive battery). This presented the combination as a routine solution to a common and well-understood problem in the field of LED illumination.
    • Expectation of Success: A POSITA would have reasonably expected success. Applying the fundamental and widely used circuit configurations from Bhat to the multi-chip Baur lamp was argued to be a routine, predictable task grounded in basic electronics principles.

  • Additional Grounds: Petitioner asserted further obviousness challenges, including that claims 1 and 6 are obvious over Steigerwald, Baur, and Singer (Ground 5); claims 1 and 11-14 are obvious over Tarsa, Baur, and Singer (Ground 7); and claim 36 is obvious over Baur, Chen, and Uemura (Ground 8). These grounds relied on similar theories of combining known rectangular chip designs, reflectors, packaging features, and power sources. An anticipation ground was also asserted against claim 16 based on Tarsa (Ground 6).

4. Relief Requested

  • Petitioner requests the institution of an inter partes review and the cancellation of claims 1-12, 14, 16-25, 28-30, 32, and 36 of Patent 6,869,812 as unpatentable.