PTAB

IPR2018-01784

Kingston Technology Co Inc v. North Star Innovations Inc

Title: SENSING CIRCUIT AND METHOD
Brief Description: The ’145 patent discloses a sensing circuit for semiconductor memory arrays designed to reduce "glitches," or invalid data transmissions, on an output data bus. The invention purports to achieve this by using a feedback loop from the bus output back to the sense amplifier's output stage and by employing a self-controlled sense amplifier that eliminates the need for external timing signals.

Prior Art Relied Upon: Oldham (Patent 5,563,835).
Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Oldham, which addresses the same problem of reducing output glitches in semiconductor memories, discloses every element of claims 1 and 6. For independent claim 1, Petitioner mapped Oldham’s sensing circuits 80 (containing sense amplifiers 110 and 120) to the claimed "sense amplifier," its latch circuit 130 to the "data storage device," and its feedback path from the output bus 90 back to the latch circuit 130 to the "data feedback circuit." For dependent claim 6, Petitioner asserted that Oldham’s tri-state buffer circuit 140 is the claimed "output buffer," which is coupled between the data storage device (latch 130) and the output data bus 90. Petitioner contended these components are arranged and function identically to the circuit claimed in the ’145 patent.
- Key Aspects: The core of this ground rested on a direct structural and functional correspondence between the circuit disclosed in Oldham's Figure 2 and the elements recited in the challenged claims, particularly Oldham's use of a feedback loop to preload a data latch and prevent transient spurious signals.

Prior Art Relied Upon: Oldham (Patent 5,563,835).
Core Argument for this Ground:
- Prior Art Mapping: Petitioner presented this ground as an alternative to anticipation, arguing that because anticipation is the "epitome of obviousness," a reference that discloses every element of a claim necessarily renders it obvious.
- Motivation to Combine (for §103 grounds): This ground relied on a single reference. The motivation, as taught by Oldham itself, was to solve the well-known problem of output glitches during memory read cycles. Petitioner asserted that to the extent any minor differences existed between Oldham and the claims, a person of ordinary skill in the art (POSA) would have been motivated to modify Oldham’s circuit using known, predictable solutions to achieve the claimed configuration. For instance, substituting one type of known latch or buffer for another would have been a routine design choice.
- Expectation of Success: A POSA would have had a high expectation of success because Oldham already taught a complete and functional solution to the glitch problem using the very same combination of components (sense amplifiers, a data latch, a feedback loop, and an output buffer). Implementing any minor variations would have involved applying established principles with predictable results.

Prior Art Relied Upon: Oldham (Patent 5,563,835).
Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that method claim 15, which corresponds to apparatus claim 1, is anticipated because Oldham's disclosed circuit inherently performs the recited steps. Petitioner mapped the step of "sensing data" to Oldham's sense amplifiers 80, the step of "driving the sensed data onto the output data bus" to Oldham's tri-state buffer 140 generating the output signal 90 on a shared bus, and the step of "providing a feedback signal ... to inactive memory blocks" to Oldham's explicit feedback loop designed to control data transitions and stabilize the output bus, which other connected memory blocks would see.
- Motivation to Combine (for §103 grounds): In the alternative, Petitioner argued that any difference between Oldham's operation and the claimed method would have been obvious. For example, a POSA would have found it obvious to use a tristate buffer to drive data onto a bus and to ensure feedback was provided to inactive blocks on a shared bus, as this was standard practice in bus-based memory systems to prevent signal contention.
- Expectation of Success: A POSA would have expected the Oldham circuit to successfully control data transitions and provide stable data on a shared bus, as this was the explicit purpose of its design.

"Coupled": Petitioner argued for the construction "directly or indirectly connecting, such as through intervening circuit elements." This construction was asserted to be critical because Oldham’s components are not always directly connected. Petitioner supported this position by pointing to figures in the ’145 patent itself, such as Figure 3, where an output buffer (15) is shown as an intervening element between the claimed data storage device (13) and the output data bus (17). Petitioner contended that a narrower construction requiring direct connection would improperly exclude the patent’s own disclosed embodiments.

Petitioner requested the institution of an inter partes review and the cancellation of claims 1, 6, and 15 of Patent 6,101,145 as unpatentable.