PTAB

IPR2018-01794

Kingston Technology Co Inc v. North Star Innovations Inc

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1. Case Identification

2. Patent Overview

  • Title: Integrated Circuit Power Management for Reducing Leakage Current in Circuit Arrays and Method Therefor
  • Brief Description: The ’555 patent discloses systems and methods for reducing static leakage current in integrated circuits. The invention involves creating independent power planes for different parts of a circuit, such as memory bit cells and their associated peripheral circuitry, allowing power to be selectively removed from the peripheral circuits while the memory cells remain powered to retain data.

3. Grounds for Unpatentability

Ground 1: Anticipation - Claims 15 and 24 are anticipated by Houston under §102

  • Prior Art Relied Upon: Houston (Patent 5,615,162).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Houston discloses every limitation of claims 15 and 24. Houston teaches a method and apparatus for selectively providing power to memory cell arrays to address leakage current. Specifically, Petitioner asserted that Houston’s Figure 6 explicitly discloses circuitry for independently powering a memory cell array and its peripheral circuitry. In this figure, a first transistor (116) controls power to the memory cell array (112), creating a first power plane, while a second transistor (120) controls power to the peripheral circuitry (114), creating an independent second power plane. Petitioner contended that Houston's logic circuit (118), which operates the second transistor based on an "ACTIVE" signal, constitutes the claimed "control circuitry" that selectively removes electrical connectivity to the peripheral circuitry. Furthermore, Petitioner argued that Houston’s disclosure of its system being used in a microprocessor context satisfies the "processing circuitry" limitation of claim 15 and the "executing instructions with a processor" step of method claim 24.
    • Key Aspects: The core of the argument is that Houston’s disclosure of separating power supplies for the memory core and its periphery to enable selective power-down for energy conservation directly maps to the elements of the challenged claims.

Ground 2: Obviousness - Claims 15 and 24 are obvious over Houston under §103

  • Prior Art Relied Upon: Houston (Patent 5,615,162).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner asserted this ground as an alternative to Ground 1, arguing that if Houston is found not to anticipate, it still renders claims 15 and 24 obvious. The argument relies on the same mappings presented for anticipation, positing that Houston discloses a system substantially identical to the one claimed. Petitioner maintained that there is no meaningful difference between Houston's teachings and the scope of the challenged claims, especially when considering the knowledge of a person of ordinary skill in the art (POSA) at the time.
    • Motivation to Combine: This is a single-reference ground. The motivation, as argued by Petitioner, would be to apply the known power management techniques taught by Houston to solve the well-understood problem of static power leakage in integrated circuits. To the extent any claimed element was not explicitly disclosed, a POSA would have been motivated to modify Houston’s system with known, conventional components to achieve predictable results. For example, implementing Houston's circuits on a single integrated chip or integrating them with a generic processor would have been an obvious design choice to improve performance and reduce form factor, common goals in the field.
    • Expectation of Success: Petitioner argued a POSA would have had a high expectation of success. The proposed modifications involve the straightforward application of basic circuit design principles and the use of standard components (like transistors and processors) in their conventional roles. Combining power-gating techniques with memory arrays was a known and predictable field of endeavor.

4. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 15 and 24 of the ’555 patent as unpatentable.