PTAB
IPR2019-00020
Samsung Electronics Co., Ltd. v. Invensas Bonding Technologies, Inc.
1. Case Identification
- Patent #: 9,391,143
- Filed: October 2, 2018
- Petitioner(s): Samsung Electronics Co., Ltd.; and Samsung Electronics America, Inc.
- Patent Owner(s): Invensas Bonding Technologies, Inc.
- Challenged Claims: 1, 3-4, 6, 14-15, 20-22, 24, 29-33
2. Patent Overview
- Title: Method for Low Temperature Bonding Based on Etching and Chemical Bonding
- Brief Description: The ’143 patent discloses a method for bonding semiconductor wafers at low or room temperatures to achieve high bond strength for subsequent processing. The method involves forming and planarizing a bonding layer, slightly etching the layer to activate the surface, terminating the activated surface with a desired chemical species, and then bringing it into contact with another surface to form a chemical bond.
3. Grounds for Unpatentability
Ground 1: Claims 1, 3-4, 6, 14-15, 21-22, 24, and 29-31 are obvious over Li in view of Reiche.
- Prior Art Relied Upon: Li (a 1998 publication on low-temperature silicon bonding) and Reiche (a 1997 publication on plasma pretreatment for Si/Si bonding).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Li taught all elements of the challenged claims. Li described a systematic process for low-temperature direct bonding of silicon and/or SiO₂ surfaces that began with cleaning and was followed by surface activation using ammonia or oxygen plasma in a reactive ion etcher (RIE). This activation, a form of etching, was followed by room-temperature contact bonding and low-temperature annealing (200°C), resulting in a strong chemical bond (>1000 mJ/m²). Petitioner asserted that Li’s requirement for "smooth, flat samples" rendered the planarization step obvious. The ammonia (NH₃) plasma inherently performed the claimed surface termination with a nitrogen-containing species during the etching step. The final bonding occurred outside the RIE chamber.
- Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine Li and Reiche because both references disclose improvements to wafer bonding to increase bond strength. Li taught a process requiring smooth surfaces and used plasma activation. Reiche investigated the specific effects of RIE plasma treatments on surface roughness. Petitioner argued a POSITA would have looked to Reiche’s detailed analysis to better understand and optimize the surface roughness results of the plasma activation process generally disclosed by Li.
- Expectation of Success: A POSITA would have had a reasonable expectation of success in applying Reiche's teachings to Li's process. Both references described using RIE with oxygen plasma on similar silicon-based surfaces (native oxide layers) to improve bonding, making the combination a predictable application of known techniques.
Ground 2: Claims 1, 3-4, 6, 14-15, 20-22, 24, and 29-31 are obvious over Li and Reiche in view of Bower.
- Prior Art Relied Upon: Li (a 1998 publication), Reiche (a 1997 publication), and Bower (Patent 5,503,704).
- Core Argument for this Ground:
- Prior Art Mapping: This ground supplemented the combination of Li and Reiche with Bower to further support the unpatentability of the claims. Petitioner argued that to the extent Li and Reiche did not explicitly disclose certain limitations, Bower provided the missing teachings. For example, Bower explicitly taught applying its low-temperature bonding process to "planarized surfaces of 'completed' integrated circuit chips," directly addressing the limitation in claim 22. For claim 20, Bower taught that successful low-temperature nitrogen bonding required a surface microroughness of less than 10 Å (1.0 nm), which Petitioner contended would have made it obvious to configure the Li/Reiche plasma process to achieve a roughness within the claimed 0.5-1.5 nm range.
- Motivation to Combine: A POSITA would combine all three references as they share a common field (wafer bonding) and goal (achieving strong, low-temperature bonds). Petitioner asserted a POSITA would have been motivated to apply Bower's specific teachings on material preparation for completed integrated circuits and surface flatness to the general plasma activation process of Li and the optimization details of Reiche. Bower provided further information on issues specifically identified by Li, such as the need for smooth surfaces and applicability to semiconductor structures.
- Expectation of Success: The combination was presented as a predictable synthesis of complementary teachings. A POSITA would expect that applying Bower's established principles for preparing surfaces of completed integrated circuits to the plasma-activated bonding process of Li/Reiche would successfully yield a robust, low-temperature bonding method for such devices.
4. Relief Requested
- Petitioner requested institution of an inter partes review and cancellation of claims 1, 3-4, 6, 14-15, 20-22, 24, and 29-33 of the ’143 patent as unpatentable under 35 U.S.C. §103.