PTAB

IPR2019-00248

Daihen Corporation v. Reno Sub-Systems, Inc.

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1. Case Identification

2. Patent Overview

  • Title: RF Impedance Matching Network for Plasma Processing
  • Brief Description: The ’122 patent discloses electronic circuits and methods for radio frequency (RF) impedance matching. The invention uses an RF impedance matching network (RF-IMN) with electronically variable capacitors (EVCs) and a control circuit to rapidly create an impedance match between a fixed-impedance RF source and a variable-impedance plasma chamber, with a key objective of achieving this match in less than about 150 microseconds (µsec).

3. Grounds for Unpatentability

Ground 1: Anticipation of Claims 1-4 and 6-11 over Zhang

  • Prior Art Relied Upon: Zhang (Patent 8,513,889)
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner asserted that Zhang taught every limitation of the challenged independent and dependent claims. Zhang discloses an RF-IMN for substrate processing that couples an RF source to a plasma chamber, matching a fixed source impedance to a variable load impedance. Zhang explicitly teaches an L-type matching network with both series and shunt electronically tunable capacitors (EVCs). Further, Zhang discloses a controller that determines the impedance, calculates required capacitance values, and generates control signals to tune the EVCs. Critically, Petitioner argued Zhang meets the timing limitation by disclosing that its matching network can minimize reflected power in "about 100 microseconds," which falls within the challenged claims' requirement of "less than about 150 µsec."

Ground 2: Obviousness of Claims 1-12 over Howald in view of Chen

  • Prior Art Relied Upon: Howald (Patent 6,259,334) and Chen (Patent 6,472,822)
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Howald discloses a complete RF-IMN for plasma processing, including an L-type topology with series and shunt variable capacitors, an RF source, a plasma chamber load, and a control circuit that repeatedly adjusts capacitance to minimize reflected power. However, Howald uses slower, mechanically-adjusted variable capacitors. Chen was cited for its teaching of faster impedance matching using EVCs, specifically PiN-diode switched capacitor banks, to achieve matching in 100 µsec for continuous wave (CW) RF-IMNs. Chen also teaches the use of associated driver circuits and RF chokes (filters) required to operate these faster EVCs.
    • Motivation to Combine: A person of ordinary skill in the art (POSITA) would be motivated by the constant industry demand for faster processing speeds. A POSITA would combine Chen's fast EVC and driver circuit technology with Howald's foundational RF-IMN design to replace its slow mechanical capacitors, thereby improving the system's overall speed and performance.
    • Expectation of Success: A POSITA would have a high expectation of success because the combination involves substituting a known, faster component (Chen's EVC) for an older, slower one (Howald's mechanical capacitor) to achieve the predictable result of a faster impedance matching network.

Ground 3: Obviousness of Claims 4-5 and 9-12 over Zhang in view of Chen

  • Prior Art Relied Upon: Zhang (Patent 8,513,889) and Chen (Patent 6,472,822)

  • Core Argument for this Ground:

    • Prior Art Mapping: This ground specifically targets claims adding driver circuits (claims 4, 9) and RF filters (claim 5). Petitioner asserted Zhang provides the base RF-IMN with EVCs as detailed in Ground 1. While Zhang's EVCs inherently require drivers, Chen explicitly discloses a specific implementation of PiN diode-based EVCs along with the necessary driver circuits and an RF choke (which Petitioner equates to the claimed "RF filter"). A POSITA would look to a reference like Chen to implement the driver and filter functionalities required by Zhang's system.
    • Motivation to Combine: A POSITA implementing Zhang's EVC-based system would need to select appropriate driver and filtering circuits. Chen provides a known, working example of such circuitry for the same application (RF impedance matching), making it an obvious choice for integration into Zhang's network.
    • Expectation of Success: Success would be expected because Chen's driver circuits and RF choke are being used for their intended purpose in a functionally identical context, making the integration a straightforward design choice.

  • Additional Grounds: Petitioner asserted that claims 1-4 and 6-11 are obvious over Zhang alone (Ground 2), arguing the use of drivers is inherent. Further obviousness challenges were asserted against claims 1-12 by adding Bhutta121 (disclosing specific EVC arrays) and Scanlan (disclosing plasma etching methods) to the Howald and Chen combination (Grounds 5-6), but these relied on similar motivations to combine known, faster components to improve system performance.

4. Key Claim Construction Positions

  • "elapsed time ... is less than about 150 µsec": Petitioner argued this term is not limited to precisely 150 µsec. Based on the specification disclosing an embodiment that operates at "approximately 110 µsec," Petitioner calculated a variance of +/-26.67% using the analysis from Cohesive Techs., Inc. v. Waters Corp. This construction means the claim encompasses any time less than 190.005 µsec, which is critical for arguing that prior art teaching 100 µsec matching (like Zhang and Chen) meets the limitation.
  • "RF filter": Petitioner contended that "RF filter" as used in claim 5 should be construed to mean "a component or circuitry that allows and/or blocks certain RF frequencies in an RF circuit." This broad construction allows the "RF choke" disclosed in Chen to meet the "RF filter" limitation, as both components perform the same basic function of blocking unwanted RF signals from driver circuits.

5. Relief Requested

  • Petitioner requested institution of an inter partes review and cancellation of claims 1-12 of the ’122 patent as unpatentable.