Qualcomm Inc. v. Apple Inc.

1. Case Identification

• Patent #: 7,355,905
• Filed: November 9, 2018
• Petitioner(s): Qualcomm Inc. and Qualcomm Technologies, Inc.
• Patent Owner(s): Apple Inc.
• Challenged Claims: 1-4 and 13

2. Patent Overview

• Title: Integrated Circuit with Separate Supply Voltage for Memory that is Different from Logic Circuit Supply Voltage
• Brief Description: The ’905 patent describes an integrated circuit featuring distinct logic and memory circuits, each powered by separate supply voltages. This architecture is intended to conserve power by allowing the logic circuit to operate at a lower voltage than the memory circuit, without compromising the memory's operational reliability.

3. Grounds for Unpatentability

Ground 1: Claims 1-4 and 13 are anticipated under 35 U.S.C. §102 by Clark.

• Prior Art Relied Upon: Clark (Patent 6,650,589).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Clark discloses every element of the challenged claims. Clark teaches an integrated circuit with a microprocessor core (logic circuit) and a memory block (memory circuit) that operate at different voltages to conserve power, addressing the same problem as the ’905 patent. The circuit includes a first supply voltage for the logic core and a second, different supply voltage for the memory block, received on separate physical inputs (pins 70 and 80). This directly maps to the limitations that were added to the ’905 patent claims during prosecution to overcome the Daga prior art reference.
  • Clark’s memory circuit is configured to be read and written responsive to the logic circuit even when the logic voltage is lower than the memory voltage, using a "translator block" that functions as a level shifter. Furthermore, Clark discloses the use of volatile Static Random Access Memory (SRAM), whose memory cells are continuously supplied by the second supply voltage during use. This addresses the other key limitation added during prosecution, which was intended to distinguish over non-volatile memory.
  • Petitioner asserted that dependent claims 2-4 are also anticipated. Clark's disclosure of its translator block and sense amplifiers being supplied by the first voltage anticipates claim 2. The combination of Clark’s translator block and decoding circuit functions as the "word line driver circuit" of claim 3. This same translator block, which adjusts signal voltages between the logic and memory circuits, constitutes the "level shifter circuit" recited in claim 4.

Ground 2: Claims 1-4 are anticipated under 35 U.S.C. §102 by Kawata.

• Prior Art Relied Upon: Kawata (Patent 6,920,071).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner contended that Kawata also teaches all limitations of claims 1-4. Kawata describes a semiconductor integrated circuit using two power supplies: a lower voltage (VDD) for the logical circuit and a higher voltage (VDDH) for the memory circuits (SRAMs). The higher memory voltage VDDH is supplied from an external terminal, satisfying the "second input" limitation. The lower logic voltage VDD is generated by an on-chip voltage down converter. Petitioner argued that under the broad construction advanced by the Patent Owner in co-pending litigation, this internal connection for VDD qualifies as being "received on a first input."
  • Kawata explicitly discloses using level-shifting circuits to enable the SRAM to be read and written responsive to the lower-voltage logic circuit, meeting the functionality requirement of claim 1[c]. Like Clark, Kawata’s use of SRAM constitutes a volatile memory whose cells are continuously supplied by the VDDH voltage during use, satisfying the limitation added during prosecution to distinguish over non-volatile memory.
  • Petitioner argued that dependent claims 2-4 are also met. Kawata’s decoder and level-shifting circuits, which are part of the SRAM, are supplied by the first supply voltage (VDD), anticipating claim 2. These same circuits perform the functions of the "word line driver circuit" recited in claim 3 and the "level shifter circuit" of claim 4.

4. Key Claim Construction Positions

• "received on a first / second input to the integrated circuit": This term was central to the petition. The ’905 patent applicants added this language during prosecution to distinguish their invention from the Daga reference, which had an internal voltage regulator and only one external power supply input. Petitioner argued that the Board should adopt a broad construction, consistent with the position taken by Patent Owner Apple in related district court litigation, that does not require the supply voltages to be generated externally. Petitioner leveraged this broad construction to argue that references like Clark (in an embodiment with an internal regulator) and Kawata (with an internal voltage down converter) meet this limitation, thereby neutralizing the amendment that led to the patent’s allowance.
• "integrated circuit": For the purposes of the IPR, Petitioner accepted the construction from the related district court case: “one or more circuit elements that are integrated onto a single semiconductor substrate.” This broad construction allows for subsets of circuitry on a chip to be considered the claimed "integrated circuit," supporting the argument that the prior art meets the claim limitations.

5. Relief Requested

• Petitioner requests institution of an inter partes review and cancellation of claims 1-4 and 13 of Patent 7,355,905 as unpatentable.