PTAB

IPR2020-00541

Intel Corp v. PACT XPP Schweiz AG

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Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Methods and devices for treating and processing data
  • Brief Description: The ’605 patent discloses a method for operating a multiprocessor system by dynamically adjusting the clock frequency of its data processing units. The frequency adjustment is based on multiple parameters, including the number of pending operations (processor load), processor voltage, available power, and temperature thresholds, to manage power consumption and prevent overheating.

3. Grounds for Unpatentability

Ground 1: Obviousness over Nicol and Kling - Claims 1-6 are obvious over Nicol in view of Kling.

  • Prior Art Relied Upon: Nicol (Patent 6,141,762) and Kling (Patent 6,367,023).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Nicol taught a multiprocessor system that dynamically adjusts clock frequency and supply voltage based on processor load to minimize power consumption. Nicol disclosed setting clock frequency to a minimum based on a low number of pending operations and increasing it to a maximum for high loads. However, Nicol did not explicitly teach thermal management. Kling was argued to supply this missing element, teaching the use of thermal sensors to monitor processor temperature. If the temperature exceeds a threshold, Kling taught reducing the processor’s clock frequency to lower power and cool the system. Kling also disclosed using hysteresis to prevent unwanted power oscillations.
    • Motivation to Combine: A POSITA would combine these references because they address complementary and critical aspects of processor management: power optimization (Nicol) and thermal protection (Kling). A POSITA seeking to improve the robustness of Nicol's high-performance system would have been motivated to add the well-known over-temperature protection taught by Kling to prevent component damage.
    • Expectation of Success: A POSITA would have a reasonable expectation of success, as implementing Kling’s thermal throttling logic would involve adding conventional software functionality to Nicol’s existing controller, a predictable engineering task.

Ground 2: Obviousness over Nicol, Kling, and DeHon - Claims 1-6 are obvious over Nicol in view of Kling and DeHon.

  • Prior Art Relied Upon: Nicol (Patent 6,141,762), Kling (Patent 6,367,023), and DeHon (Patent 6,052,773).
  • Core Argument for this Ground: This ground builds upon the Nicol and Kling combination to satisfy Petitioner’s proposed claim construction for “data processing unit” as requiring a “reconfigurable” processor.
    • Prior Art Mapping: The mapping for Nicol and Kling remained the same as in Ground 1. DeHon was introduced to explicitly teach a reconfigurable microprocessor chip that includes a fixed processor core and a programmable gate array. Petitioner argued that DeHon’s reconfigurable processors could serve as the processing elements (PEs) within the multiprocessor architecture described by Nicol.
    • Motivation to Combine: A POSITA would combine DeHon with the Nicol/Kling system because Nicol’s architecture was described as flexible and intended for a "mix of many digital signal processing applications." DeHon’s reconfigurable chips were taught as building blocks for a wide range of applications that yield "application acceleration." Therefore, a POSITA would be motivated to substitute the PEs in Nicol’s system with DeHon’s reconfigurable chips to improve performance and adaptability.
    • Expectation of Success: Success would be expected because Nicol’s power management scheme was described as "extensible to other system arrangements" and agnostic to the specific type of PEs used, making the integration of DeHon's reconfigurable chips straightforward.

Ground 3: Obviousness over Nicol, Kling, DeHon, and Bhatia - Claims 1-6 are obvious over Nicol in view of Kling, DeHon, and Bhatia.

  • Prior Art Relied Upon: Nicol (Patent 6,141,762), Kling (Patent 6,367,023), DeHon (Patent 6,052,773), and Bhatia (Patent 6,535,798).
  • Core Argument for this Ground: This ground was presented to demonstrate obviousness under both Petitioner’s and Patent Owner’s claim constructions, particularly for the term "to a minimum." It added Bhatia to the combination from Ground 2.
    • Prior Art Mapping: The prior art mapping for Nicol, Kling, and DeHon was maintained. Bhatia was added to explicitly teach a low-power mode consistent with the well-known Advanced Configuration and Power Interface (ACPI) C3 state. In the C3 state, the processor clock is disabled (i.e., set to zero), but the processor maintains data in its internal cache. Petitioner contended this teaching satisfied both its own construction of "to a minimum" (a level required to preserve memory) and the Patent Owner’s plain-meaning construction (a clock frequency of zero).
    • Motivation to Combine: A POSITA would be motivated to incorporate Bhatia’s teachings because all the references were directed to interrelated power and thermal management in processor systems. To implement a comprehensive low-power strategy in the combined Nicol/Kling/DeHon system, a POSITA would naturally turn to industry standards like ACPI, which Bhatia described in detail.
    • Expectation of Success: Integrating a well-defined industry standard low-power state, such as the ACPI C3 state taught by Bhatia, into a processor system was a common and predictable task for a POSITA.

4. Key Claim Construction Positions

  • “data processing unit … adapted for sequentially processing data”: Petitioner proposed this term meant "reconfigurable and sequential data processors where the data results from one processor are fed to another." This construction was central to Ground 2, which added the DeHon reference to teach reconfigurability. Patent Owner proposed a simpler construction of "passing results onto one or more other data processing units which are subsequently processing data."
  • “to a minimum”: Petitioner proposed this term meant "to a level no more than is required for the preservation of memory contents or the like." Patent Owner argued for its plain and ordinary meaning. This dispute was central to Ground 3, which added the Bhatia reference to teach the ACPI C3 state, which Petitioner argued satisfied both constructions.

5. Relief Requested

  • Petitioner requests institution of inter partes review and cancellation of claims 1-6 of the ’605 patent as unpatentable.