NVIDIA Corp v. Invensas Corp

1. Case Identification

• Case #: IPR2020-00603
• Patent #: 6,232,231
• Filed: February 20, 2020
• Petitioner(s): NVIDIA Corporation
• Patent Owner(s): Invensas Corporation
• Challenged Claims: 1-8

2. Patent Overview

• Title: Method for Providing a Substantially Planar Semiconductor Topography
• Brief Description: The ’231 patent relates to methods for improving the surface planarity of semiconductor devices during manufacturing. The disclosed invention addresses non-uniformities like "dishing" and "erosion" that arise during chemical-mechanical polishing (CMP) by first etching and filling non-functional "dummy trenches" in open dielectric areas to equalize the pattern density across the wafer surface.

3. Grounds for Unpatentability

Ground 1: Obviousness over Jaso and Stine1998 - Claims 1-4 and 8 are obvious over Jaso in view of Stine1998.

• Prior Art Relied Upon: Jaso (Patent 6,093,631) and Stine1998 (an IEEE journal article titled "The physical and electrical effects of metal-fill patterning practices...").
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Jaso disclosed the core method of the ’231 patent: using a damascene process to add "dummy circuitry" into areas of low pattern density to achieve a uniform surface for subsequent CMP, thereby solving the known problems of dishing and erosion. While Jaso taught the general method, Stine1998 provided a specific, practical application by teaching the placement of dummy metal-fill into the "large open areas" commonly found between wide interconnects (e.g., bond pads on a chip's periphery) and a series of narrow interconnects (e.g., densely packed signal lines in the chip's core). Petitioner asserted this combination directly taught the claimed configuration of placing a plurality of dummy conductors between a wider first trench and a series of narrower second trenches.
  • Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine these references because they addressed the identical problem of CMP non-planarity. A POSITA implementing the general method of Jaso would look to a practical guide like Stine1998, which provided a detailed case study on an actual IC layout. Stine1998 explicitly identified the large open areas between wide peripheral bond pads and narrow core interconnects as "prime candidates for metal-fill." Furthermore, Stine1998 enhanced Jaso by teaching how to analyze and mitigate the parasitic capacitance added by dummy fill, making the combination a logical design choice.
  • Expectation of Success: A POSITA would have had a reasonable expectation of success because the combination involved applying the specific layout guidance from Stine1998 to the well-understood damascene process of Jaso. This was a predictable implementation of known techniques to achieve the well-documented benefit of improved planarity.

Ground 2: Obviousness over Jaso, Stine1998, and Robinson - Claims 5-7 are obvious over Jaso in view of Stine1998 and Robinson.

• Prior Art Relied Upon: Jaso (Patent 6,093,631), Stine1998 (an IEEE journal article), and Robinson (Patent 5,879,222).

• Core Argument for this Ground:

  • Prior Art Mapping: This ground built upon the Jaso and Stine1998 combination to establish the fundamental method of claim 1. Petitioner then introduced Robinson to teach the specific polishing limitations recited in dependent claims 5-7. Robinson disclosed an improved CMP pad with abrasive particles fixed into a polymer matrix. This design allowed for polishing with a liquid "substantially free of particulate matter," directly mapping to the limitations of claims 5, 6, and 7, which recite applying an "abrasive polishing surface" comprised of fixed particles in a polymer matrix.
  • Motivation to Combine: A POSITA would combine Robinson's teachings with the Jaso/Stine1998 combination to achieve a superior overall planarization result. Jaso and Stine1998 addressed planarity issues arising from pattern density variation, while Robinson addressed planarity issues arising from non-uniform slurry distribution. Petitioner argued that using an improved polishing pad (Robinson) on a wafer prepared with a more uniform pattern density (Jaso/Stine1998) was a combination of two complementary and known solutions to achieve a common goal.
  • Expectation of Success: The combination was predictable, as it involved using an improved and known polishing apparatus (from Robinson) on a wafer that had been prepared using a known method for enhancing polishability (from Jaso/Stine1998).

• Additional Grounds: Petitioner asserted additional obviousness challenges for claims 1-4 and 8 over Jaso, Stine1998, and Pramanik1997, and for claims 5-7 over Jaso, Stine1998, Pramanik1997, and Robinson. Pramanik1997 (a 1997 conference proceeding) was cited to further teach the use of "dummy metal fill" to solve dishing problems with "wide metal buses" in damascene processes.

4. Key Claim Construction Positions

• Petitioner noted that the ’231 patent was subject to claim construction in co-pending litigation, where the term "dummy conductors" was construed as "conductive structures that are not connected to any active or passive devices that function as an integrated circuit."
• Petitioner argued that no specific constructions were necessary for the purpose of the IPR, as its unpatentability analysis was the same under both the plain and ordinary meaning of the claim terms and the district courts' constructions.

5. Arguments Regarding Discretionary Denial

• The petition presented extensive arguments that discretionary denial under 35 U.S.C. §314(a) and §325(d) would be inappropriate, despite two prior IPR petitions having been filed against the ’231 patent (IPR2017-00831 and IPR2018-01401).
• Petitioner argued that the General Plastic factors strongly favored institution because: (1) NVIDIA was not a party to, nor "similarly situated" to, the prior petitioners (Broadcom and Samsung); (2) the prior art references (Jaso, Stine1998, Pramanik1997, Robinson) and the asserted grounds were entirely new and had never been considered by the Patent Office during original prosecution or in the prior IPRs; and (3) denying institution would be unfairly prejudicial to NVIDIA.

6. Relief Requested

• Petitioner requests institution of an inter partes review and cancellation of claims 1-8 of the ’231 patent as unpatentable.