PTAB
IPR2020-01210
Xilinx Inc v. Analog Devices Inc
Key Events
Petition
Table of Contents
petition Intelligence
1. Case Identification
- Case #: IPR2020-01210
- Patent #: 10,250,250
- Filed: July 17, 2020
- Petitioner(s): Xilinx, Inc. and Xilinx Asia Pacific Pte. Ltd.
- Patent Owner(s): Analog Devices, Inc.
- Challenged Claims: 1-3, 11-18, and 20-22
2. Patent Overview
- Title: Bootstrapped Switching Circuit
- Brief Description: The ’250 patent discloses a bootstrapped switching circuit designed for accelerated turn-on of a sampling switch. The circuit comprises a sampling switch, a bootstrapped voltage generator with a positive feedback loop, and a dedicated "jump start" circuit that initially turns on an output transistor to speed up the process before disengaging to allow the feedback loop to take over.
3. Grounds for Unpatentability
Ground 1: Anticipation over Kudo - Claims 1-3, 11-18, and 20-22 are anticipated by Kudo under 35 U.S.C. §102.
- Prior Art Relied Upon: Kudo (Patent 7,183,814).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Kudo, which was not considered during prosecution, discloses every limitation of the challenged claims. Kudo describes a "bootstrap circuit" for controlling the gate voltage of a MOS transistor (transistor 10) that functions as the claimed sampling switch. The circuit includes a bootstrapped voltage generator comprising a boot capacitor (12) and a positive feedback loop. Crucially, Petitioner asserted Kudo discloses a jump start circuit (comprising inverters 30 and 31 and transistor 22) that performs the claimed function of turning on the output transistor (transistor 23) to accelerate the circuit's operation. Kudo’s jump start circuit is also shown to cease its action after a limited time, allowing the positive feedback loop to maintain the gate voltage of the sampling switch, mapping directly to the limitations that were key to the patent's allowance.
Ground 2: Obviousness over Doris - Claims 1-3, 11-18, and 20-22 are obvious over Doris under 35 U.S.C. §103.
- Prior Art Relied Upon: Doris (Patent 8,664,979).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner contended that Doris discloses every element of the claims, albeit across two different embodiments. Doris's Figure 4 discloses a conventional bootstrapped tracking circuit with a sampling switch (402) and positive feedback loop. Doris separately discloses, in Figure 9, a "tracking phase A circuitry" (903) that functions as a jump start circuit by providing a path to quickly pull the gate of a switch transistor to an on-voltage level, accelerating its turn-on. Petitioner argued that combining the jump start functionality of Doris's Figure 9 with the primary bootstrapped circuit of Figure 4 would result in the claimed invention.
- Motivation to Combine: The primary motivation, as argued by Petitioner, is expressly stated within the Doris reference itself. Doris acknowledges that the bootstrapped circuit in Figure 4 may not be able to turn on the sampling switch "fast enough," presenting a known problem. The jump start circuit of Figure 9 is presented as a solution for accelerating turn-on time. A POSITA would therefore combine the disclosed solution with the circuit having the stated problem. Further motivations included the superior reliability and lower cost of the conventional Figure 4 circuit, making it a desirable base to improve with the Figure 9 speed-up technique.
- Expectation of Success: Petitioner asserted a POSITA would have a high expectation of success because combining two disclosed embodiments from a single prior art reference to solve a problem explicitly identified in that same reference is a predictable design step. The petition also noted that modifying the PMOS-based jump start circuit of Doris to an NMOS equivalent to turn on the PMOS output transistor in the main circuit would be an obvious and well-known design choice for faster performance.
4. Key Claim Construction Positions
- Means-Plus-Function Limitations (Claims 20-22): Petitioner provided constructions for the means-plus-function terms in claims 20-22, which were central to the patentability arguments during prosecution.
- For the function "means for turning on the output transistor for a limited period of time," Petitioner identified the corresponding structure in the ’250 patent as "Jump Start Circuit 302 and associated examples of Figs. 4A–4B and 5A–5C."
- For the function "means for ceasing pulling the gate voltage... after the limited period of time," Petitioner identified the same corresponding structure, arguing its operation inherently includes the cessation of the pulling action. These constructions were critical to mapping the jump start circuits of Kudo and Doris to the claim limitations.
5. Relief Requested
- Petitioner requested the institution of an inter partes review and cancellation of claims 1-3, 11-18, and 20-22 of the ’250 patent as unpatentable.
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