PTAB

IPR2020-01288

Sony Interactive Entertainment LLC v. Bot M8 LLC

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1. Case Identification

2. Patent Overview

  • Title: Information Processing Device, Method for Inspecting Fault, and Program
  • Brief Description: The ’988 patent discloses techniques for inspecting faults in an information processing device, such as a gaming machine. The invention involves storing a fault inspection program on a first memory device (e.g., ROM) that is independent from a second memory device (e.g., hard disk) to ensure the inspection program can operate properly even if a fault exists on the second device.

3. Grounds for Unpatentability

Ground 1: Obviousness over Sugiyama and Gatto - Claims 1-9 are obvious over Sugiyama in view of Gatto.

  • Prior Art Relied Upon: Sugiyama (JP Publication # 2000-35888) and Gatto (WO # 2004/004855).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Sugiyama, which discloses a karaoke terminal, teaches nearly all elements of independent claims 1 and 6. Sugiyama’s system includes a CPU (“control device”), a ROM (“first memory device”) storing a “startup program” (“boot program”), and an HDD (“second memory device”) storing application programs. The CPU executes an “HDD inspection program” from the ROM to check for faults on the HDD before starting the main karaoke application. Petitioner contended that while Sugiyama does not explicitly mention a motherboard, Gatto teaches using motherboards in gaming terminals. Therefore, it would have been an obvious design choice to place Sugiyama's electronic components on a motherboard as taught by Gatto.
    • Motivation to Combine: A POSITA would combine Sugiyama and Gatto to implement Sugiyama’s fault-checking system using the well-known and ubiquitous motherboard architecture disclosed in Gatto to achieve a predictable result. Further, a POSITA would be motivated to modify Sugiyama's karaoke device to execute a game application, as suggested by Gatto, to increase user entertainment and expand the device's market.
    • Expectation of Success: A POSITA would have had a high expectation of success in placing Sugiyama’s components on a standard motherboard, as this was a common, off-the-shelf technique for building electronic devices.

Ground 2: Obviousness over Morrow and Morrow ’771 - Claims 1-9 are obvious over Morrow in view of Morrow ’771.

  • Prior Art Relied Upon: Morrow (Application # 2004/0054952) and Morrow ’771 (Application # 2003/0064771).

  • Core Argument for this Ground:

    • Prior Art Mapping: Petitioner asserted that Morrow teaches a gaming machine that meets the limitations of the independent claims. Morrow’s device includes a BIOS chip (“first memory device”) that stores both a “file allocation reader” (argued to be a “boot program”) and “verification software” (a “fault inspection program”). A CPU (“control device”) executes the verification software from the BIOS to inspect for faults, such as bad sectors or tampering, on a persistent storage media like a hard disk (“second memory device”) before a game application is started. Morrow ’771, which shares a common inventor and describes similar technology, was cited to explicitly teach placing the BIOS chip on a motherboard.
    • Motivation to Combine: A POSITA would combine Morrow and Morrow ’771 because they describe related technology from the same inventor. A POSITA seeking to implement the system in Morrow would naturally look to Morrow ’771 for details on the preferred hardware environment, which explicitly discloses situating the BIOS chip on a motherboard.
    • Expectation of Success: The combination involved implementing known electronic components (CPU, BIOS, storage) on a motherboard, which was a standard and well-understood practice, leading to a predictable outcome.

  • Additional Grounds: Petitioner asserted additional obviousness challenges, including adding Yamaguchi (Patent 5,844,776) to the primary combinations to further teach connecting an independent hard drive to a motherboard; adding Proudler (WO # 00/73904) to further teach mounting RAM on a motherboard; and adding Cheston (Application # 2003/0135350) to the primary combinations to teach storing an extended BIOS on the second memory device.

4. Key Claim Construction Positions

  • “Boot Program”: Petitioner argued this term should have its plain and ordinary meaning: “a small start-up program that enables a computer to load larger programs.” This construction is critical because the prior art discloses basic startup routines (like Sugiyama’s “startup program” or Morrow’s “file allocation reader”) that might not meet a narrower construction requiring initialization of an “extended BIOS” or loading a full operating system.
  • “Fault Inspection Program”: Petitioner proposed this term means a program that inspects for any fault (damage, change, or falsification) in the second memory device hardware and the game application program. This construction supports mapping the term to prior art verification software that checks for a broad range of errors, including bad sectors and software tampering.

5. Arguments Regarding Discretionary Denial

  • Petitioner argued that discretionary denial under §325(d) would be inappropriate because the primary prior art reference, Sugiyama, was never substantively considered by the examiner during prosecution. Although Sugiyama was cited on an IDS, it was submitted without an English-language translation, and only a brief English abstract was provided. Petitioner contended that Sugiyama is substantially different from Bizzarri, a reference the examiner did consider, because Sugiyama teaches a boot program that is distinct from its fault inspection program, a key aspect of the invention not present in Bizzarri.

6. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-10 of the ’988 patent as unpatentable under 35 U.S.C. §103.