PTAB

IPR2021-00108

NVIDIA Corp v. Advanced Cluster Systems Inc

Log In
Key Events
Petition
petition Intelligence

1. Case Identification

2. Patent Overview

  • Title: System for Parallelizing Mathematical Functions in a Computer Cluster
  • Brief Description: The ’877 patent describes a computer cluster system designed to parallelize mathematical computations across multiple processors. The system’s purported innovation is enabling peer-to-peer communication between nodes through a software architecture comprising "kernel modules" (e.g., Mathematica or Maple kernels) that execute tasks and "cluster node modules" that manage internode communications.

3. Grounds for Unpatentability

Ground 1: Obviousness over Distributed Maple References - Claims 1 and 8-11 are obvious under 35 U.S.C. §103 over a combination of references describing the "Distributed Maple" system.

  • Prior Art Relied Upon: Schreiner1 (“Distributed Maple: parallel computer algebra in networked environments,” a 2003 journal article), Schreiner2 (“Distributed Maple – User and Reference Manual,” a 2001 manual), Schreiner3 (“Task Logging, Rescheduling and Peer Checking in Distributed Maple,” a 2002 paper), the Distributed Maple Code (source code published by 2003), the Maple Guide (“Maple V Learning Guide,” a 1998 guide), PC Magazine1 (an Aug. 1992 article on Maple V), and PC Magazine2 (a July 1993 article on Maple V).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued the combination discloses every element of the challenged claims. Schreiner1 taught the overall "Distributed Maple" system, a cluster of nodes that receive instructions from a front-end user interface and communicate peer-to-peer to execute them in parallel. Each node ran a "single-node kernel module" (a Maple kernel) that interpreted instructions. Communication was managed by "cluster node modules" (the dist.Scheduler and dist.maple software components). The "special purpose microprocessor" limitation of claim 1 was taught by PC Magazine1 and PC Magazine2, which stated that Maple V (the kernel used by Schreiner1) was designed for systems with a math coprocessor (e.g., an 80387). Claim 8's limitation of performing computations on a "list of elements" was taught by Schreiner2's example of a program that recursively partitions a list of integers for parallel factorization across the cluster nodes.
    • Motivation to Combine: A person of ordinary skill in the art (POSITA) would combine the Schreiner references and the Distributed Maple Code because they all describe a single, unified project, share a common author, and were publicly available together. A POSITA would combine these with the Maple Guide and PC Magazine articles to understand the functionality and system requirements of the underlying Maple V software, which the Distributed Maple system was explicitly built upon.
    • Expectation of Success: A POSITA would have a high expectation of success, as the combination primarily involves integrating components from a single, pre-existing, and operational software project (Distributed Maple) with its documented base software (Maple V).

Ground 2: Obviousness over Distributed Maple and Nayak - Claims 1 and 10-11 are obvious over the references of Ground 1 in further view of Nayak.

  • Prior Art Relied Upon: The references of Ground 1 in further view of Nayak (“A Library based compiler to execute MATLAB Programs on a Heterogeneous Platform”).

  • Core Argument for this Ground:

    • Prior Art Mapping: This ground reinforces the "special purpose microprocessor" limitation. Nayak taught a cluster-based system for parallelizing MATLAB (a mathematical program analogous to Maple) on a cluster of Digital Signal Processors (DSPs). This is significant because a DSP is the only specific example of a "special purpose microprocessor" disclosed in the ’877 patent itself. Nayak taught how to convert instructions from an interpreted language (MATLAB) into code executable by a DSP cluster.
    • Motivation to Combine: A POSITA would be motivated to apply Nayak's teachings to the Distributed Maple system. Nayak showed that DSPs are well-suited for the types of matrix operations performed by Distributed Maple. Because Nayak provided a detailed roadmap for adapting an interpreted math program for a DSP cluster, a POSITA would have been motivated to apply this proven approach to the similar interpreted language of Maple to achieve the same performance benefits.

  • Additional Grounds: Petitioner asserted additional obviousness challenges against claim 5, which requires the special purpose microprocessor to have "multiple processor cores."

    • Ground 3 added Kelly (Patent 6,691,216) to the Ground 2 combination. Kelly, a Texas Instruments patent, taught a multi-core DSP, which a POSITA would naturally combine with Nayak's system that used TI DSPs.
    • Ground 4 added the SPARC IV Article and the AMD Article to the Ground 1 combination. These articles showed that multi-core processors were well-known and commercially available before the patent's priority date, making it an obvious design choice to implement the Distributed Maple system on such hardware for known performance gains.

4. Arguments Regarding Discretionary Denial

  • Petitioner argued that discretionary denial under §314(a) based on the Fintiv factors would be inappropriate. The petition asserted that the parallel district court litigation was in a very early stage, with no Markman hearing conducted or expert discovery begun.
  • Petitioner contended that a stay of the litigation was likely and that the scheduled trial date was after the deadline for a Final Written Decision (FWD) in the IPR.
  • Critically, Petitioner stipulated that if the IPR is instituted, it would not pursue the same invalidity grounds in the district court, thus preventing duplicative efforts and preserving judicial resources. These factors, Petitioner argued, weighed strongly against discretionary denial.

5. Relief Requested

  • Petitioner requested the institution of an inter partes review and the cancellation of claims 1, 5, and 8-11 of the ’877 patent as unpatentable.