Google LLC v. Singular Computing LLC

1. Case Identification

• Case #: IPR2021-00164
• Patent #: 9,218,156
• Filed: November 5, 2020
• Petitioner(s): Google LLC
• Patent Owner(s): Singular Computing LLC
• Challenged Claims: 1-8, 16-25, and 33-42

2. Patent Overview

• Title: Low Precision High Dynamic Range Processing Unit
• Brief Description: The ’156 patent describes a device with at least one "low precision high dynamic range" (LPHDR) execution unit. The unit is designed to perform mathematical operations that are intentionally imprecise but can handle a wide range of numerical values, purportedly offering benefits in computing efficiency.

3. Grounds for Unpatentability

Ground 1: Claims 1-8, 16-25, and 33-42 are obvious over Bates-2010

• Prior Art Relied Upon: Bates-2010 (Application # 2010/0325186).
• Core Argument for this Ground: Petitioner's central argument was that the challenged claims of the ’156 patent were not entitled to the priority date of the earlier ’201 application (filed in 2010). This was because the ’201 application’s specification failed to provide adequate written description and enabling disclosure for the full scope of the challenged claims, as required by 35 U.S.C. §112. The claims broadly covered a genus of "execution units" defined by functional performance, encompassing implementations using conventional silicon transistors as well as nascent, unpredictable technologies like DNA computing, nanomechanical systems, and various analog designs. Petitioner argued the specification only described a conventional digital silicon-based implementation in any detail, and even that description was insufficient to demonstrate possession of the claimed functional limitations. Because the claims were not entitled to the 2010 priority date, the inventor's own published application, Bates-2010 (which is the published version of the ’201 application), became indisputable prior art under 35 U.S.C. §102.
  • Prior Art Mapping: Petitioner argued that Bates-2010 disclosed all elements of the challenged claims or rendered them obvious. Bates-2010 described a device with an LPHDR execution unit, such as a silicon-implemented floating-point unit, capable of performing operations like multiplication. It also disclosed a dynamic input range ("from one millionth up to one million") that met the claimed range (limitation [1B1]). Although Bates-2010 did not explicitly link its described hardware to the specific error rates claimed (limitation [1B2]: an error of at least Y=0.05% for at least X=5% of inputs), it separately suggested these exact performance characteristics as desirable. Petitioner contended that a person of ordinary skill in the art (POSA) would have understood how to modify the disclosed floating-point unit—for example, by reducing the number of mantissa bits—to achieve the suggested error rates. The reference also disclosed a control unit (CPU) for controlling the execution units, meeting limitation [1C].
  • Motivation to Combine: This was a single-reference obviousness challenge. The motivation was inherent in Bates-2010, which disclosed both a specific hardware implementation (a silicon-based floating-point unit) and desirable functional performance characteristics (target error rates). A POSA would have been motivated to implement the disclosed hardware in a way that achieved the explicitly suggested performance goals to gain the benefits of imprecise computing described in the reference.
  • Expectation of Success: A POSA would have had a reasonable expectation of success in achieving the claimed invention. Modifying a conventional digital floating-point unit to increase its error rate was a predictable art. A POSA could have used routine software emulation to determine the number of mantissa bits required to produce the desired error rate for a given operation before implementing it in hardware.

4. Arguments Regarding Discretionary Denial

• Petitioner argued that discretionary denial under §314(a) based on the Fintiv factors was inappropriate. The core arguments were:
  • The petition was filed diligently and expeditiously, only a few months after infringement contentions were served in the parallel district court litigation and before preliminary invalidity contentions were due.
  • The parallel litigation was in its infancy, with no trial date set, minimal discovery conducted, and no substantive investment in validity issues. Petitioner asserted that the PTAB’s final written decision would likely issue long before a district court trial.
  • The Office had not previously considered the petition's priority-based arguments, meaning the petition presented art and arguments not previously considered under §325(d).

5. Relief Requested

• Petitioner requested the institution of an inter partes review and the cancellation of claims 1-8, 16-25, and 33-42 of the ’156 patent as unpatentable.