PTAB

IPR2021-00941

Micron Technology Inc v. Unification Technologies LLC

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Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Systems and Methods for Persistent Deallocation
  • Brief Description: The ’658 patent describes an apparatus for managing data in a non-volatile storage medium, such as a solid-state drive (SSD). The apparatus receives a message with a logical identifier that indicates associated data has been erased, and in response, stores persistent data that also indicates the data is erased.

3. Grounds for Unpatentability

Ground 1: Obviousness over Shu, Shu Trim Proposals, and IBM - Claims 1-5 and 8-12 are obvious over Shu in view of the Shu Trim Proposals and IBM.

  • Prior Art Relied Upon: Shu (Patent 9,207,876), Shu Trim Proposals (April 2007 standards-body proposals), and IBM (a 1995 journal article titled Design of a Solid-State File Using Flash EEPROM).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner’s argument hinged on establishing that the asserted prior art predates the ’658 patent’s effective filing date (see Section 5 below). Shu taught a “remove-on-delete” command, functionally identical to the industry TRIM command, sent from a host file system to an SSD to identify invalid data following a file deletion. This command used a logical block address (LBA) and length, which Petitioner argued corresponds to the claimed “message comprising a logical identifier” that indicates “data...has been erased” from a user's perspective. IBM taught a foundational flash memory architecture that used an address translation table (ATT) to map logical sector addresses to physical sector addresses. Crucially, IBM disclosed storing persistent status flags (“valid,” “invalid,” or “blank”) in non-volatile EEPROM memory to track data status for garbage collection and wear-leveling. Petitioner mapped IBM's persistent “invalid” and “blank” flags to the claimed “storage module configured to store persistent data...to indicate that the data...is erased.”
    • Motivation to Combine: A person of ordinary skill in the art (POSITA) would have been motivated to implement Shu’s “remove-on-delete” command in a conventional flash memory device like that described in IBM. Shu’s command was designed to solve a known problem in SSDs—performance degradation from managing invalid data during garbage collection and wear leveling, which are core functions of the IBM system. By informing the IBM-type device which logical blocks were invalid, the device could operate more efficiently. Petitioner asserted this motivation was not hypothetical, as Frank Shu presented his proposals to the T13 standards committee, which included industry members who manufactured such devices, leading to the adoption of the TRIM command in the ATA standard.
    • Expectation of Success: A POSITA would have had a high expectation of success. The combination involved providing new information (invalid data locations from Shu) to a system (IBM) already designed to use that type of information (status flags for garbage collection). Integrating the command was a predictable application of known technologies to achieve the expected benefit of improved SSD performance.

4. Key Claim Construction Positions

  • “data associated with the logical identifier [has been/is] erased”: For the purposes of the petition, Petitioner adopted the Patent Owner’s apparent litigation position for this term. This position construes “erased” as a logical erasure (e.g., deleted from a user’s perspective via a file system operation), not necessarily a physical erasure of the data from the non-volatile memory. This construction was critical because the Shu and Shu Trim Proposal references describe a command that indicates such a logical erasure, which then allows the SSD to later physically erase the data during internal maintenance operations like garbage collection.

5. Key Technical Contentions (Beyond Claim Construction)

  • Priority Date Entitlement: A foundational contention of the petition was that the ’658 patent is not entitled to the filing date of its earliest provisional application (filed in 2006). Petitioner argued that the 2006 provisional lacked written description support for key limitations added during prosecution, specifically: (1) a message comprising a logical identifier indicating that data has been erased, and (2) a storage module that stores persistent data in response to that indication. Petitioner contended the provisional’s disclosure of an “empty-block directive” was high-level and failed to describe these specific claim elements. This argument, if successful, would move the patent's effective priority date to at least September 22, 2007, thereby making the Shu patent (priority April 2007) and the Shu Trim Proposals (published April 2007) available as intervening prior art under 35 U.S.C. §102(a) and §102(e).

6. Arguments Regarding Discretionary Denial

  • Petitioner argued that institution would be proper and not cumulative of the original examination. It was asserted that the Examiner never considered the most relevant prior art—specifically, the early versions of the Shu Trim Proposals or the IBM journal article. Petitioner noted that the applicant only disclosed a much later, post-priority-date version of the Shu proposal to the USPTO, meaning the key invalidating combination was never before the Examiner. Further, Petitioner distinguished this IPR from a parallel proceeding (IPR2021-00344) by explaining the other petition assumed the earlier 2006 priority date and therefore argued invalidity based on different prior art. This petition was presented as necessary to address the invalidity arguments that arise specifically from the priority date dispute.

7. Relief Requested

  • Petitioner requested institution of an inter partes review and cancellation of claims 1-5 and 8-12 of Patent 8,762,658 as unpatentable.