PTAB

IPR2021-01056

OpenSky Industries LLC v. VLSI Technology LLC

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Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Minimum Memory Operating Voltage Technique
  • Brief Description: The ’373 patent relates to a method for managing power in an integrated circuit by determining and storing a memory's minimum operating voltage. The system ensures the memory is always supplied with at least this minimum voltage, even when the voltage supplied to other functional circuits (e.g., a processor) is reduced below that level for power-saving purposes.

3. Grounds for Unpatentability

Ground 1: Claims 1, 3, 5-6, 9-11, and 13 are obvious over Harris in view of Abadeer and Zhang.

  • Prior Art Relied Upon: Harris (Patent 5,867,719), Abadeer (Application # 2006/0259840), and Zhang (Application # 2003/0122429).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Harris taught the foundational system: an integrated circuit with a memory and a separate functional circuit (CPU), where a switching circuit dynamically selects between a primary voltage (VDD) and a second, standby voltage (VSTBY) to power the memory. This switching is used to either enter a low-power state or to prevent data loss if VDD falls below a "set level or threshold." Petitioner contended that Abadeer supplied the missing teachings for determining this threshold by disclosing a method to test for a memory's minimum operating voltage using a Built-In-Self-Test (BIST) and storing this value in non-volatile memory (e.g., fuses). Finally, Zhang was argued to teach the use of integrated voltage regulators to provide the stable and adjustable regulated voltages that Harris described only as being supplied from external terminals.
    • Motivation to Combine: A POSITA seeking to implement Harris's voltage-switching system would be motivated to find a reliable method for establishing the "set level or threshold" that triggers the switch. Petitioner asserted that Abadeer’s BIST-based method for determining and storing a minimum operating voltage was a known and logical solution for this purpose. Similarly, to provide the stable, variable voltages required for Harris's low-power modes, a POSITA would combine Harris’s architecture with Zhang’s well-known technique of using integrated voltage regulators, which offered precise, on-chip voltage control.
    • Expectation of Success: Petitioner argued that combining these known elements would yield predictable results. Integrating Abadeer’s testing methodology and Zhang's voltage regulators into Harris’s architecture was a straightforward application of conventional techniques to improve a known system's power management and reliability.

Ground 2: Claims 2 and 11 are obvious over Harris, Abadeer, and Zhang in view of Cornwell.

  • Prior Art Relied Upon: Harris (Patent 5,867,719), Abadeer (Application # 2006/0259840), Zhang (Application # 2003/0122429), and Cornwell (Patent 7,702,935).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground built upon the combination in Ground 1 to address the limitations of claims 2 and 11, which specify that the "minimum operating voltage" comprises distinct values for minimum read, write, and standby operations. While Abadeer taught determining a minimum standby/retention voltage, Petitioner argued that Cornwell explicitly disclosed testing a memory to determine and store separate minimum operating voltages for different functions, including read and write, to maximize power savings. Cornwell's teachings were presented as an enhancement to the base system established by the combination of Harris, Abadeer, and Zhang.
    • Motivation to Combine: A POSITA aiming to further optimize the power consumption of the system from Ground 1 would be motivated to go beyond a single standby voltage. Petitioner claimed a POSITA would look to Cornwell, which taught that determining function-specific minimum voltages for read and write operations allows a device to operate closer to its true minimums under various conditions, thereby achieving greater power savings. This was a direct and logical optimization.
    • Expectation of Success: Applying Cornwell’s more granular testing approach to the memory within the Harris/Abadeer/Zhang system was a predictable design choice. It represented a known method for improving a known device (an IC with power management) in a predictable way (achieving greater power efficiency).

4. Arguments Regarding Discretionary Denial

  • Petitioner argued that discretionary denial under §314(a) based on the Fintiv factors was inappropriate. The Petitioner, OpenSky Industries, LLC, is unrelated to Intel Corporation, the defendant in a parallel district court proceeding involving the ’373 patent. Critically, Petitioner asserted that the specific prior art and invalidity grounds presented in the petition were never raised, considered, or decided upon by the judge or jury in the district court case. Therefore, Petitioner contended there was no overlap of issues, no risk of inconsistent decisions, and no inefficiency that would warrant denying institution.

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-3, 5-6, 9-11, and 13 of Patent 7,523,373 as unpatentable under 35 U.S.C. §103.