Intel Corp v. Acqis LLC

1. Case Identification

• Case #: IPR2021-01108
• Patent #: 9,529,768
• Filed: June 14, 2021
• Petitioner(s): Intel Corporation
• Patent Owner(s): Acqis LLC
• Challenged Claims: 1-3, 7-9, 13-17, 19-20, 25, 33-35

2. Patent Overview

• Title: Computer System with Attached Computer Module
• Brief Description: The ’768 patent describes a computer system architecture featuring a modular design with a removable Attached Computer Module (ACM) and a Peripheral Console (PCON). The ACM contains core processing components (CPU, memory, graphics), while the PCON provides connectivity for peripherals and user interface devices.

3. Grounds for Unpatentability

Ground 1: Obviousness over Chu330 and Cupps - Claims 13-16 and 33-34 are obvious over Chu330 in view of Cupps.

• Prior Art Relied Upon: Chu330 (Patent 6,345,330) and Cupps (Application # 2003/0135771).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Chu330 discloses a modular computer system with an ACM and PCON that contains nearly all elements of the challenged claims, including a CPU, a host interface controller (HIC), and a bidirectional Low Voltage Differential Signal (LVDS) channel (termed XPBus). However, in Chu330, the core components within the ACM are discrete. Cupps was cited for its teaching of integrating multiple functionalities—such as embedded and non-embedded processors with controllers—onto a single integrated circuit to achieve well-known benefits. Petitioner asserted that combining Cupps’s teaching of single-chip integration with Chu330’s architecture renders the "integrated central processing unit and interface controller in a single chip" limitation of independent claim 13 obvious.
  • Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine the teachings to achieve the known and predictable benefits of integration expressly taught by Cupps. These benefits included reduced power consumption, smaller physical footprint, and increased performance—all desirable improvements for the system disclosed in Chu330.
  • Expectation of Success: A POSITA would have had a reasonable expectation of success in integrating Chu330’s ACM components onto a single chip. Petitioner contended that the components in Chu330’s system (CPU, graphics, HIC) were substantially similar to those that Cupps taught were commonly integrated, making the combination a predictable application of known techniques.

Ground 2: Obviousness over Chu330, Cupps, and Helms - Claims 1-3, 7-9, 17, 19-20, 25, and 35 are obvious over Chu330 in view of Cupps and Helms.

• Prior Art Relied Upon: Chu330 (Patent 6,345,330), Cupps (Application # 2003/0135771), and Helms (Patent 7,146,510).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground builds upon the Chu330/Cupps combination by adding Helms to address limitations related to Phase-Locked Loop (PLL) clock circuitry generating different clock frequencies, as recited in independent claim 1. While Chu330 discloses a PLL, Helms was introduced for its explicit teaching of an I/O hub with a PLL that generates multiple, adjustable clock frequencies for its communication links. Helms incorporates the HyperTransport specification, which details using a register to select different operating frequencies. Petitioner argued that adding Helms's teaching of a variable-frequency PLL to the integrated controller of the Chu330/Cupps combination renders claim 1 obvious.
  • Motivation to Combine: A POSITA would be motivated to incorporate Helms’s teachings to gain improved power management and system flexibility. Helms explicitly teaches that adjusting link frequency provides a power management capability and allows for greater flexibility in system design. Applying this known technique to the interface in Chu330 would have been a logical step to improve the system.
  • Expectation of Success: Petitioner asserted a high expectation of success, as Helms demonstrates that using a PLL to generate and select different clock frequencies for a high-speed data interface was a well-understood and conventional technique. Applying this established method to the substantially similar interface in Chu330 would have yielded predictable results.

4. Key Technical Contentions (Beyond Claim Construction)

• Improper Priority Claim: A central contention of the petition is that the ’768 patent is not entitled to a priority date earlier than April 15, 2011. Petitioner argued that key limitations, including the "integrated CPU-controller" and direct "CPU-LVDS" connection, were new matter first introduced in a parent '436 patent. Petitioner further argued that the ’436 patent’s attempt to incorporate this subject matter by reference from an earlier provisional application was defective because the chain of parent applications failed to properly incorporate the provisional with the required specificity. This argument, if successful, establishes that numerous references, including Cupps and Helms, are valid prior art.

5. Arguments Regarding Discretionary Denial

• §325(d) Prosecution History: Petitioner argued against discretionary denial because the Examiner did not determine the proper priority date for the challenged claims and therefore never considered references like Cupps in the proper context. While Chu330 was on an Information Disclosure Statement, it was never substantively applied by the Examiner against the claims, meaning the core arguments of the petition were never presented to the Office.
• §314(a) Fintiv Factors: Petitioner argued that the Fintiv factors weigh in favor of institution. The petition was filed early in the parallel district court litigation, before claim construction or significant discovery. Critically, the Petitioner, Intel, is not a defendant in the parallel litigation. Petitioner argued that denying institution based on litigation involving different parties (Real Parties-in-Interest Lenovo) would contradict Congressional intent. Furthermore, the RPIs are willing to stipulate not to advance the same invalidity grounds in district court if the IPR is instituted, mitigating concerns of duplicative efforts.

6. Relief Requested

• Petitioner requests institution of an inter partes review and cancellation of claims 1-3, 7-9, 13-17, 19-20, 25, and 33-35 as unpatentable.