Intel Corp v. Acqis LLC

1. Case Identification

• Case #: IPR2021-01114
• Patent #: U.S. Reissued Patent No. 44,654
• Filed: June 29, 2021
• Petitioner(s): Intel Corporation
• Patent Owner(s): Acqis LLC
• Challenged Claims: 17-19, 26-31, 35-36

2. Patent Overview

• Title: Computer System with Attached Computer Module and Peripheral Console
• Brief Description: The ’654 patent describes a modular computer system comprising a removable Attached Computer Module (ACM) and a Peripheral Console (PCON). The ACM contains core components like the CPU and graphics, while the PCON provides connectivity to peripherals, with communication between them occurring over a high-speed serial interface.

3. Grounds for Unpatentability

Ground 1: Obviousness over Chu, Peleg, and Helms - Claims 17-19, 26, and 35 are obvious over Chu in view of Peleg and Helms.

• Prior Art Relied Upon: Chu (Patent 6,345,330), Peleg (Patent 6,557,065), and Helms (Patent 7,146,510).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner asserted that Chu taught a modular computer system (notebook and docking station) using a high-speed serial interface (XPBus) to overcome the disadvantages of bulky, high-pin-count connectors. However, Chu's specific embodiments did not disclose integrating the CPU and graphics controller onto a single chip. Peleg allegedly supplied this missing element by teaching a highly integrated architecture where the CPU, graphics processor, and Northbridge are combined on a single chip, which is then connected to a Southbridge. To bridge the remaining gap, Petitioner argued that Helms taught an I/O Hub that integrated the functionalities of a Southbridge and an interface controller (like Chu's Host Interface Controller). The combination of these references, Petitioner contended, disclosed all limitations of the independent claims, including an integrated CPU/graphics controller on a single chip connected to a peripheral bridge via a high-speed, bidirectional LVDS channel.
  • Motivation to Combine: A POSITA would combine Chu and Peleg to gain the benefits of Peleg’s high-performance integrated architecture within Chu’s modular, portable form factor. This amounted to a simple substitution of one known computer architecture for another to obtain predictable results. A POSITA would further incorporate the teachings of Helms to integrate the Southbridge and interface controller into a single chip, a known technique for improving efficiency, reducing component count, and lowering power consumption.
  • Expectation of Success: A POSITA would have a reasonable expectation of success because the references describe compatible computer architectures with common components (CPU, Northbridge, Southbridge, PCI bus). Implementing integrated components within a modular system was a well-understood design choice at the time.

Ground 2: Obviousness over Chu, Peleg, Helms, and Chu777 - Claims 27-31 and 36 are obvious over Chu in view of Peleg, Helms, and Chu777.

• Prior Art Relied Upon: Chu (Patent 6,345,330), Peleg (Patent 6,557,065), Helms (Patent 7,146,510), and Chu777 (Patent 6,643,777).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground built upon the combination established in Ground 1 to address additional dependent claims requiring an Ethernet connection. Petitioner argued that the base combination of Chu/Peleg/Helms established the core computer architecture with a CPU connected to a peripheral bridge via an LVDS channel. Chu777, a parent patent to the ’654 patent that incorporates Chu, was introduced because it explicitly taught adding a "network card 555," which it described as a local area network for Ethernet, to the peripheral console (docking station). Petitioner argued that adding the Ethernet device from Chu777 to the docking station of the base combination rendered the remaining claims obvious.
  • Motivation to Combine: The motivation for adding Chu777’s teachings was to provide the system with network connectivity, a highly desirable and common feature for computer systems. Petitioner argued it would have been a simple and obvious modification to add the Ethernet device taught by Chu777 to the PCI bus of the docking system in the Chu/Peleg/Helms combination to enable network access.
  • Expectation of Success: A POSITA would have a high expectation of success, as adding network cards to docking stations via a standard PCI bus was a routine and well-understood practice.

4. Key Claim Construction Positions

• "peripheral bridge": Petitioner argued this term should be construed as "a southbridge that interfaces with a peripheral bus or device." This construction was critical, as the patent specification and its incorporated references allegedly distinguish between a "CPU bridge" (Northbridge) and a "peripheral bridge" (Southbridge). This distinction underpinned Petitioner's arguments regarding both priority date and obviousness.

5. Key Technical Contentions (Beyond Claim Construction)

• Improper Priority Claim: A central contention was that the challenged claims were not entitled to their claimed priority date and should be afforded a priority date no earlier than June 17, 2011. Petitioner argued that key limitations—specifically the "integrated CPU/graphics" on a single chip and the direct connection of a "CPU" to a "peripheral bridge"—were added as new matter in a parent application (RE984). This new matter allegedly originated from a provisional application ('886 Provisional) that was never properly incorporated by reference into the priority chain, breaking the chain of priority for the challenged claims.

6. Arguments Regarding Discretionary Denial

• Petitioner argued against discretionary denial under §325(d), contending that the Examiner never substantively considered the primary combinations asserted in the petition. While some references were listed in an IDS, they were not applied against the claims, and the Examiner failed to properly analyze the critical priority date issue. Petitioner also argued against denial under Fintiv, emphasizing that: (1) Petitioner Intel is not a party to the parallel district court litigation; (2) the litigation is in its early stages; and (3) the Real Parties-in-Interest (who are defendants) are willing to stipulate not to pursue the same invalidity grounds in court if the IPR is instituted, mitigating concerns of duplicative efforts.

7. Relief Requested

• Petitioner requested institution of an inter partes review and cancellation of claims 17-19, 26-31, and 35-36 of the ’654 patent as unpatentable.