Hewlett Packard Enterprises Co v. Intellectual Ventures II LLC

1. Case Identification

• Case #: IPR2022-00115
• Patent #: 7,464,240
• Filed: October 29, 2021
• Petitioner(s): Hewlett Packard Enterprise Co.
• Patent Owner(s): Intellectual Ventures II LLC
• Challenged Claims: 1, 3, 7, and 8

2. Patent Overview

• Title: Solid-State Drive with Write-Back Cache Management
• Brief Description: The ’240 patent relates to a solid-state drive (SSD) that uses a volatile memory as a write-back cache for a non-volatile flash memory. The technology is directed at improving write performance by having a controller manage the process of moving, or "destaging," data from the volatile cache to the non-volatile memory based on data volume thresholds.

3. Grounds for Unpatentability

Ground 1: Anticipation and Obviousness over Harari - Claims 1, 3, and 7 are anticipated by or obvious over Harari.

• Prior Art Relied Upon: Harari (Patent 6,523,132).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Harari disclosed every limitation of claims 1, 3, and 7. Harari teaches a solid-state disk comprising a volatile cache memory, a non-volatile flash memory, and a controller. The controller manages read/write requests using a write-back cache methodology, where incoming data is first written to the volatile cache. Harari’s controller performs a destaging operation when the cache reaches a "predetermined state of fullness," at which point it moves the "least active files"—those longest in the cache without being updated—from the volatile cache to the non-volatile flash memory and marks the vacated cache locations as available. This process, triggered by the cache fullness, meets the "trigger event" limitation of claim 7.
  • Key Aspects: Petitioner contended that Harari, which issued over three years before the ’240 patent's priority date, describes the exact conventional write-back cache functionality that the ’240 patent claims.

Ground 2: Obviousness over Harari in view of Hu - Claims 1, 3, 7, and 8 are obvious over Harari and Hu.

• Prior Art Relied Upon: Harari (Patent 6,523,132) and Hu ("RAPID-Cache," an IEEE article from March 2002).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground asserted that Harari teaches the base system of a solid-state drive with a threshold-based destaging mechanism, as described in Ground 1. Hu was introduced to supply the specific limitation of claim 8, which requires the destaging process to be "repeatedly performed by the controller until a predetermined minimum threshold value of data in volatile memory is realized." Hu explicitly taught a well-known "high-low water-mark" destaging algorithm. In this algorithm, destaging begins when the number of "dirty blocks" (valid data) in the cache exceeds a high water-mark (e.g., 70% capacity) and continues until the dirty block count falls below a low water-mark (e.g., 30% capacity), which corresponds to the claimed "predetermined minimum threshold."
  • Motivation to Combine: Petitioner argued a person of ordinary skill in the art (POSITA) implementing Harari's system would have faced the question of how much data to destage once the fullness threshold was reached. A POSITA would combine Harari with Hu's well-known algorithm to solve this problem, as it provided a simple and effective method to improve system performance by preventing the cache from being either completely emptied (hurting read performance) or frequently overflowing.
  • Expectation of Success: A POSITA would have a high expectation of success, as combining Hu's software-based algorithm with Harari's standard hardware architecture was a routine and predictable implementation.

Ground 3: Obviousness over Tobita in view of Hu - Claims 1, 3, 7, and 8 are obvious over Tobita and Hu.

• Prior Art Relied Upon: Tobita (Patent 5,862,083) and Hu ("RAPID-Cache," an IEEE article from March 2002).

• Core Argument for this Ground:

  • Prior Art Mapping: This ground presented Tobita as an alternative primary reference disclosing the base system. Tobita taught an information processing system with a volatile cache, non-volatile flash memory, and a controller. The controller was designed to "monitor the amount of data stored" and, to avoid overflow, destage data by selecting an address with the "oldest" access time and transferring the corresponding data to non-volatile storage. As in the previous ground, Hu was cited to teach the specific repeated destaging process of claim 8, where the process continues until a low water-mark threshold is met.
  • Motivation to Combine: The motivation was analogous to that for the Harari and Hu combination. A POSITA would have been motivated to improve Tobita's basic destaging mechanism with the more refined and well-known high-low water-mark algorithm from Hu. This would improve cache efficiency and overall system performance by providing a clear stop condition for the destaging process.
  • Expectation of Success: Success would be reasonably expected because the combination involved applying a known caching algorithm (Hu) to a compatible system (Tobita) to achieve a predictable improvement in performance.

• Additional Grounds: Petitioner asserted additional anticipation and obviousness challenges based on Tobita alone but relied on similar arguments as those presented for Harari.

4. Arguments Regarding Discretionary Denial

• Petitioner argued that discretionary denial under 35 U.S.C. § 314(a) based on Fintiv factors would be inappropriate. The parallel district court litigation was in a very early stage, with an uncertain trial date more than a year away. Critically, Petitioner stipulated it would not pursue in the district court the same invalidity grounds or prior art raised in the inter partes review (IPR), eliminating any risk of duplicative efforts or inconsistent results.
• Petitioner also contended that denial under 35 U.S.C. § 325(d) was not warranted because the primary prior art references relied upon (Harari, Tobita, and Hu) were not before the USPTO examiner during the original prosecution of the ’240 patent. Therefore, the arguments and art presented in the petition were being considered by the Office for the first time.

5. Relief Requested

• Petitioner requests institution of IPR and cancellation of claims 1, 3, 7, and 8 of the ’240 patent as unpatentable.