Google LLC v. Arigna Technology Ltd

1. Case Identification

• Case #: IPR2022-00685
• Patent #: 6,603,343
• Filed: March 10, 2022
• Petitioner(s): Google LLC
• Patent Owner(s): Arigna Technology Limited
• Challenged Claims: 1-4

2. Patent Overview

• Title: Phase Correction Circuit for Transistor Using High-Frequency Signal
• Brief Description: The ’343 patent discloses a phase correction circuit designed to stabilize the phase of an output signal from a transistor operating at high frequencies. The circuit compensates for phase shifts caused by increases in the transistor’s gate-source capacitance by using a circuit element, such as a reverse-biased diode, whose reactance changes inversely to that of the transistor, thereby keeping the total reactance substantially constant.

3. Grounds for Unpatentability

Ground 1: Anticipation of Claims 1 and 2 by Jeon

• Prior Art Relied Upon: Jeon (Patent 6,222,412).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Jeon discloses a circuit for controlling waveform distortion in high-frequency amplifiers that anticipates every limitation of claims 1 and 2. Jeon’s circuit comprises a field effect transistor (FET), a diode connected to the FET’s gate, and a voltage control circuit that adjusts the diode’s anode voltage. Petitioner asserted this structure directly maps to the claimed “phase correction circuit,” “circuit element,” and “voltage control circuit.” Crucially, Jeon was alleged to explicitly teach that its circuit achieves a “constant value” for the sum of the diode’s capacitance and the gate-source capacitance to reduce phase distortion, directly corresponding to the limitation in claim 1 that this sum “remains substantially constant.”
  • Key Aspects: For claim 2, Petitioner contended that Jeon discloses the claimed reverse-biased diode, explaining that the voltage applied to the diode’s anode (Vdiode = 2Vp) is more negative than the voltage at its cathode (Vbias = Vp), where Vp is a negative voltage, thereby establishing a reverse bias.

Ground 2: Anticipation of Claims 1, 2, and 3 by Yoshimasu

• Prior Art Relied Upon: Yoshimasu (Japanese Patent Publication No. JPH 0440702).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Yoshimasu, which discloses an impedance matching circuit, independently anticipates claims 1-3. Yoshimasu’s circuit includes a diode connected in parallel with an FET to compensate for changes in the FET’s capacitance. A bias terminal (the “voltage control circuit”) supplies a control voltage to the diode’s anode. Petitioner asserted that Yoshimasu teaches that the diode’s capacitance varies inversely with the FET’s capacitance, such that “no change arises in the capacitance at point E,” satisfying the “substantially constant” limitation of claim 1.
  • Key Aspects: Petitioner contended that Yoshimasu anticipates the reverse bias of claim 2 by disclosing that the bias voltage applied to the diode anode is set to be lower than the gate-source voltage. For claim 3, Petitioner argued that Yoshimasu’s Figure 1 explicitly shows a transmission line serially connected to the cathode of the diode, which is in turn connected to the gate of the transistor, thus anticipating all limitations of claim 3.

Ground 3: Obviousness of Claim 3 over Jeon in view of LaRosa or Garver

• Prior Art Relied Upon: Jeon (Patent 6,222,412), LaRosa (Patent 3,422,378), and Garver (Patent 3,479,615).

• Core Argument for this Ground:

  • Prior Art Mapping: This ground addressed claim 3, which adds to claim 1 the requirement of “a transmission line serially connected to one of the anode and cathode of the diode.” Petitioner argued that while Jeon discloses the base circuit of claim 1, it does not explicitly disclose a transmission line. LaRosa and Garver, however, both teach phase shifters that use varactor diodes serially connected to transmission lines.
  • Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine the teachings of LaRosa or Garver with Jeon’s circuit to improve its phase correction performance. Petitioner argued that incorporating a transmission line was a well-known technique for achieving additional phase shifting and impedance matching, providing a clear motivation to modify Jeon’s design for enhanced, predictable results.
  • Expectation of Success: The combination was presented as straightforward, as serially connecting a well-known transmission line to the diode in Jeon’s circuit would have been a trivial design modification for a POSITA.

• Additional Grounds: Petitioner asserted additional obviousness challenges, including that claim 4 is obvious over Jeon in view of Oswald or Meyer, and over Yoshimasu in view of Oswald or Meyer, based on the known design choice of replacing a single diode with a back-to-back diode pair to reduce distortion.

4. Key Claim Construction Positions

• For the purposes of the inter partes review (IPR), Petitioner adopted the Patent Owner’s interpretation from co-pending district court litigation, where the claim term “reactance” is treated as synonymous with “capacitance.”
• Petitioner argued that under its ordinary technical meaning, reactance is inversely proportional to capacitance. Therefore, a circuit where capacitance decreases (as disclosed in the ’343 patent) would exhibit an increase in reactance, rendering the claim language—which requires reactance to decrease—indefinite under 35 U.S.C. §112.
• By adopting the Patent Owner’s broader interpretation, Petitioner aimed to proceed with an invalidity analysis on the merits, asserting that the prior art discloses the required functionality whether the term is interpreted as reactance or capacitance.

5. Arguments Regarding Discretionary Denial

• Petitioner argued that discretionary denial under §314(a) based on the Fintiv factors would be improper.
• The core arguments were that the petition was filed diligently (approximately five months after the complaint), the parallel district court case was in its earliest stages with no significant investment of resources (no claim construction briefing, discovery, or expert reports had occurred), and a decision in the IPR would resolve invalidity for all challenged claims (1-4), whereas only claim 1 was asserted in the litigation, promoting efficiency and avoiding duplicative efforts.

6. Relief Requested

• Petitioner requests institution of an IPR and cancellation of claims 1-4 of the ’343 patent as unpatentable.