PTAB

IPR2023-00785

Intel Corp v. BiTMICRO LLC

Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Method and Device for Booting an Embedded System
  • Brief Description: The ’084 patent discloses methods and systems for booting an embedded system using a "Power-On Reset (POR) sequencer descriptor." This descriptor, stored in nonvolatile memory, contains register initialization information, Direct Memory Access (DMA) descriptors, and system firmware to orchestrate a resilient boot-up sequence.

3. Grounds for Unpatentability

Ground 1: Obviousness over Post, Wilson, and Kao - Claims 1, 5, 8-9, and 19-20 are obvious over Post in view of Wilson and Kao.

  • Prior Art Relied Upon: Post (8,799,555), Wilson (7,861,073), and Kao (7,490,177).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that the combination of these references discloses all elements of the challenged claims. Post taught a foundational method for booting an embedded system by copying boot data, including firmware, from nonvolatile memory (NVM) to RAM. Post’s boot data was organized in a linked-list format across potentially non-consecutive memory pages, using metadata pointers to fetch subsequent fragments and verify data integrity, which provides a resilient boot sequence. Petitioner contended this boot data and its associated metadata constitute the claimed "POR sequencer descriptor."

    • To meet the specific components of the descriptor recited in claim 1, Petitioner mapped teachings from the secondary references. Wilson taught that boot data for a microcontroller should include "predefined initial values" to be loaded into configuration registers to prepare the system for operation. This addresses the claimed "information to initialize configuration registers." Kao taught using a DMA engine to offload the task of copying boot data from NVM to RAM from the host processor, thereby reducing complexity and cost. Petitioner argued that Post's metadata pointers, when used by a DMA engine as taught by Kao, function as the claimed "DMA descriptors used to fetch other POR sequencer descriptor fragments." Post itself disclosed that the boot data included firmware, such as a first-stage bootloader, meeting the final element of the descriptor. Dependent claims were argued to be obvious for reciting conventional features of such a boot process, such as activating an error handler (taught by Post) and performing a register initialization phase (taught by Wilson).

    • Motivation to Combine: Petitioner asserted that a person of ordinary skill in the art (POSITA) would combine these references to arrive at the claimed invention. A POSITA looking to implement Post's boot process, which is silent on register initialization, would have consulted a reference like Wilson, which addressed the known problem of loading initial values into registers as a necessary step for system operation. Furthermore, a POSITA would combine Kao's teachings with Post to improve system performance. Kao explicitly taught that using a DMA engine for boot data transfers was a known technique to offload work from the host processor, a universal motivation in embedded system design to reduce workload, complexity, and cost.

    • Expectation of Success: Petitioner argued a POSITA would have had a reasonable expectation of success. The combination involved applying known techniques (register initialization, DMA transfers) to a familiar problem (booting an embedded system) using compatible components (SoCs, NVM, RAM). Wilson showed how to initialize registers in a similar microcontroller, and Kao demonstrated how to implement DMA for boot data transfers in a similar embedded system. The integration was presented as a predictable application of established engineering principles.

4. Arguments Regarding Discretionary Denial

  • Petitioner argued against discretionary denial under 35 U.S.C. §325(d) because the core prior art and arguments were not previously presented to the USPTO. While Kao was listed in an Information Disclosure Statement, the examiner never substantively discussed it in any office action or rejection, and critically, never considered it in combination with Post and Wilson, which were never before the examiner at all. Petitioner further argued against discretionary denial under the Fintiv factors, asserting that the co-pending district court litigation in the Northern District of California was in its very early stages. No scheduling order had been issued, and significant litigation events like claim construction and expert discovery remained far in the future, with an estimated trial date well after the statutory deadline for a Final Written Decision in the inter partes review (IPR).

5. Relief Requested

  • Petitioner requests institution of IPR and cancellation of claims 1, 5, 8-9, and 19-20 of the ’084 patent as unpatentable.