PTAB
IPR2023-00922
Realtek Semiconductor Corp v. ATI Technologies ULC
Key Events
Petition
Table of Contents
petition Intelligence
1. Case Identification
- Case #: IPR2023-00922
- Patent #: 8,760,454
- Filed: May 19, 2023
- Petitioner(s): Realtek Semiconductor Corp.
- Patent Owner(s): ATI Technologies ULC
- Challenged Claims: 1-11
2. Patent Overview
- Title: Graphics Processing Architecture Employing a Unified Shader
- Brief Description: The ’454 patent describes a graphics processing architecture featuring a “unified shader.” This architecture uses a single, common processor unit to perform both vertex calculation operations and pixel calculation operations, aiming to improve efficiency and reduce the hardware footprint compared to traditional systems that use separate, dedicated processors for each task.
3. Grounds for Unpatentability
Ground 1: Claims 1-11 are obvious over the Lindholm Patents
- Prior Art Relied Upon: Lindholm ’685 (Patent 7,038,685) and Lindholm ’913 (Patent 7,015,913).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Lindholm ’685 discloses the core unified shader architecture claimed in the ’454 patent. It teaches a programmable graphics pipeline with multithreaded processing units capable of simultaneously processing both vertex and pixel samples. The "Execution Unit" in Lindholm ’685 corresponds to the claimed "processor unit," the "Register File" maps to the "general purpose register block," and the combination of the "Instruction Scheduler" and "Instruction Dispatcher" maps to the claimed "sequencer." Lindholm ’685 also discloses using thread allocation and execution priorities to manage workload, satisfying limitations related to performing operations based on available resources or workload.
- Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine the two Lindholm patents because they share the same inventor, were filed within days of each other, and are directed to the same multithreaded unified shader architecture. The ’913 patent provides additional implementation details for the system in the ’685 patent, particularly regarding the independent scheduling of threads to prevent stalls when one thread is waiting for data. This combination would improve the performance and efficiency of the ’685 system in a predictable way.
- Expectation of Success: A POSITA would have a high expectation of success, as the combination involves integrating complementary details from two highly related patents describing a single, cohesive system architecture.
Ground 2: Claims 1-11 are obvious over Amanatides in view of Kohn
- Prior Art Relied Upon: Amanatides (a 1993 publication titled A Simple, Flexible, Parallel Graphics Architecture) and Kohn (a 1989 IEEE article titled Introducing the Intel i860 64-bit Microprocessor).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner asserted that Amanatides describes a unified shader architecture using an Intel i860 processor to achieve "auto load balancing" between vertex (geometry) and pixel (rendering) processing in the same processor unit. Kohn provides the technical details of the i860 processor itself, explaining it has separate functional blocks for floating-point operations (used for vertex processing) and integer/scalar operations (used for pixel processing), allowing for their parallel execution. This maps directly to the ’454 patent’s claimed processor unit. Amanatides further discloses using a priority system for vertex and pixel packets, and the i860 processor’s on-chip instruction cache and memory management unit (detailed in Kohn) function as the claimed "sequencer."
- Motivation to Combine: A POSITA would combine these references because Amanatides explicitly states its architecture is implemented using the Intel i860 processor. Kohn is a technical article describing the exact structure and operation of that processor. Therefore, a POSITA seeking to implement or understand the Amanatides system would have been directly motivated to consult Kohn for the necessary hardware details.
- Expectation of Success: Success would be expected, as Kohn merely provides the known, detailed specifications for a component expressly identified for use in the primary Amanatides reference.
Ground 3: Claims 1-11 are obvious over Selzer in view of Fiske
- Prior Art Relied Upon: Selzer (a 1993 publication titled Dynamic Load Balancing within a High Performance Graphics System) and Fiske (a 1995 publication titled Thread prioritization: A Thread Scheduling Mechanism for Multiple-Context Parallel Processors).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Selzer teaches a unified shader system that achieves dynamic load balancing. Selzer’s "rendering modules" are capable of performing both vertex ("geometry") and pixel processing tasks, adapting their function based on the processing requirements of the scene. The "master module" in Selzer acts as a sequencer, fetching tasks and distributing them to the rendering modules. This system meets the core limitations of the challenged claims.
- Motivation to Combine: A POSITA would combine Selzer with Fiske to improve performance and efficiency. Both references address dynamic load balancing. Fiske teaches a multithreaded processor using a thread prioritization scheme for rapid context switching. A POSITA would find it obvious to implement Fiske’s more advanced multithreaded architecture within Selzer’s rendering modules. This would replace Selzer's need for multiple physical rendering modules with a single, more efficient multithreaded module, saving chip space while performing the same load-balancing functions in a predictable manner.
- Expectation of Success: The combination would yield predictable results, as it involves applying a known technique (Fiske's multithreading) to a known system (Selzer's graphics architecture) to achieve the well-understood benefits of multithreading.
4. Arguments Regarding Discretionary Denial
- Petitioner argued that the Board should not exercise discretionary denial under Fintiv. A related district court case is in its very early stages, with no trial date set, and the case has been stayed at the Patent Owner’s request.
- Petitioner also argued against denial under §325(d), asserting that the Examiner never cited or considered the references forming the basis for Grounds 2 and 3 (Amanatides, Kohn, Selzer, and Fiske) during the original prosecution of the ’454 patent.
5. Relief Requested
- Petitioner requests institution of an inter partes review (IPR) and cancellation of claims 1-11 of the ’454 patent as unpatentable under 35 U.S.C. §103.
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