Apple Inc v. Sonrai Memory Ltd

1. Case Identification

• Case #: IPR2023-00975
• Patent #: 6,874,014
• Filed: May 23, 2023
• Petitioner(s): Apple Inc.
• Patent Owner(s): Sonrai Memory Limited
• Challenged Claims: 1, 3, 5, 7, 11-13, 15

2. Patent Overview

• Title: Multiprocessing Chip Utilizing Multiple Operating Systems
• Brief Description: The ’014 patent describes a chip architecture with multiple processors mounted on a single die. The system is configured to run multiple operating systems simultaneously from a connected memory to improve performance over prior art systems that typically used a single operating system.

3. Grounds for Unpatentability

Ground 1: Obviousness over Gulick in view of AAPA - Claims 1, 3, 5, 7, 11-13, 15 are obvious over Gulick in view of Applicant Admitted Prior Art (AAPA).

• Prior Art Relied Upon: Gulick (Patent 6,314,501) and AAPA from the ’014 patent.
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Gulick disclosed a multi-processor computer system that allows multiple, independent operating systems to execute concurrently in different memory partitions. Gulick’s system included multiple processor modules connected to a main memory. The only element Petitioner contended Gulick did not explicitly teach was mounting the multiple processors on a single die. This missing limitation, Petitioner asserted, was supplied by the AAPA within the ’014 patent itself, which acknowledged that mounting multiple processors on a single die was a well-known, conventional technique used to conserve space and improve performance.
  • Motivation to Combine: A POSITA would combine Gulick’s multi-OS architecture with the single-die processor configuration admitted as known in the AAPA to achieve the predictable benefits of such a configuration. These benefits, explicitly mentioned in the AAPA, included conserving system space, reducing communication latency between processors, improving message passing efficiency, and increasing scalability for multiprocessing. Applying this known hardware optimization (single die) to Gulick's known software architecture (multi-OS) was presented as a common-sense design choice.
  • Expectation of Success: A POSITA would have a reasonable expectation of success in this combination because it involved applying a conventional hardware layout (single-die multiprocessor) to a known multi-OS system architecture. Gulick provided detailed teachings on implementing multiple operating systems, and the AAPA confirmed the feasibility and benefits of the single-die approach, requiring no undue experimentation.

Ground 2: Obviousness over AAPA in view of Gulick - Claims 1, 3, 5, 7, 11-13, 15 are obvious over AAPA in view of Gulick.

• Prior Art Relied Upon: AAPA from the ’014 patent and Gulick (Patent 6,314,501).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground inverted the primary and secondary references. Petitioner asserted that the AAPA established the baseline system: a conventional single-die chip multiprocessor connected to memory, as depicted in Figure 2 of the ’014 patent. The AAPA, however, described this conventional system as typically using a single operating system, which suffered from performance degradation as the number of processors increased. Petitioner argued that Gulick supplied the solution by teaching a method for implementing multiple, concurrently executing operating systems in a multi-processor environment to improve efficiency.
  • Motivation to Combine: A POSITA, starting with the conventional single-die system of the AAPA and recognizing its acknowledged performance limitations, would be motivated to look for known solutions. Gulick directly addressed this problem by disclosing how to use memory partitioning to allow multiple operating systems to run on a multi-processor system. Therefore, a POSITA would combine Gulick’s teachings with the AAPA system to improve its performance, a classic example of applying a known technique to a known system to achieve predictable results.
  • Expectation of Success: Success would be expected because the combination involved modifying the software environment of a conventional hardware platform (AAPA) using established techniques for multi-OS implementation (Gulick). Gulick’s detailed description of memory partitioning and managing separate operating systems provided a clear roadmap for implementation on the AAPA’s hardware.

4. Key Claim Construction Positions

• "simultaneously executing two or more operating systems": Petitioner noted that the parties in the parallel district court litigation agreed to construe this phrase as "simultaneously executing two or more independent operating systems." Petitioner argued the claims were obvious under this construction, as Gulick explicitly taught that "at least two of the operating systems are different and one operating system does not control or manage the second operating system."
• "processor means" (claim 12): For this means-plus-function term, the parties agreed on the function "executing a plurality of operating system means" and the corresponding structure from the specification (chip multiprocessors 350 or 450). Petitioner argued that Gulick’s processor modules, when combined with the single-die teaching of AAPA, met this structural requirement.
• "memory means" (claim 12): For this means-plus-function term, the function is "storing said plurality of operating system means." Petitioner argued that the corresponding structure (e.g., SRAM, DRAM) was disclosed in Gulick, which described its main memory as comprising banks of DRAM.

5. Arguments Regarding Discretionary Denial

• Petitioner argued that discretionary denial under Fintiv was inappropriate. The key arguments asserted that the parallel district court trial date was not definitively set and was likely to occur after the FWD deadline, favoring institution. Petitioner further stipulated that, if IPR is instituted, it would not pursue the same invalidity grounds in the district court, mitigating concerns of overlapping issues. Finally, Petitioner contended that because a prior IPR on the ’014 patent was terminated post-institution without a final decision, and because Apple was not a party to that IPR, the merits of these grounds had not been fully considered by the Board, weighing against denial.

6. Relief Requested

• Petitioner requested institution of an inter partes review and cancellation of claims 1, 3, 5, 7, 11-13, and 15 of the ’014 patent as unpatentable under 35 U.S.C. §103.