PTAB

IPR2024-00343

Qualcomm Inc v. Network System Technologies LLC

Key Events

Petition

petition

Title: Communication Service Mapping in an Integrated Circuit
Brief Description: The ’052 patent describes a system-on-chip (SoC) where multiple processing modules communicate over an interconnect. The invention centers on a method for mapping communication service requests to specific connections based on a "communication service identifier," which must comprise either a "communication thread" or an "address range."

Prior Art Relied Upon: Rădulescu et al., “An Efficient On-Chip Network Interface…” (a 2004 conference proceeding, "Rădulescu2004").
Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Rădulescu2004, a publication by the patent's own inventors that predates the patent's filing by more than a year, discloses every limitation of the challenged claims. Rădulescu2004 describes a Network-on-Chip (NoC) architecture (the Æthereal NoC) with master and slave processing modules coupled by a router network. It teaches enabling connection-based communication with specific properties like guaranteed delivery and ordering. Crucially, Petitioner asserted that Rădulescu2004 discloses mapping communication requests to specific connections based on an address provided in the transaction. This mapping occurs in a "narrowcast module," where the address determines the slave destination, and the configurable "address range assigned to a slave" directly corresponds to the claimed "address range" limitation that was added to secure allowance of the ’052 patent.
- Key Aspects: This ground relies on a publication from the patent's own inventors that was not considered during prosecution but allegedly discloses the very feature added to overcome prior art rejections.

Prior Art Relied Upon: Rădulescu2004 and Open Core Protocol Specification, Release 1.0 (2001, "OCP").
Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that to the extent Rădulescu2004 does not explicitly disclose using a "communication thread" for mapping, it would have been obvious to do so by implementing the OCP protocol within the Rădulescu2004 system. Rădulescu2004 provides the foundational NoC architecture. OCP, a well-known SoC communication protocol standard, explicitly teaches the use of a thread identifier signal (MThreadID) in communication requests to manage properties such as ordering and priority.
- Motivation to Combine: A POSITA would combine these references because Rădulescu2004 expressly states its system was designed to provide "backward compatibility to existing on-chip communication protocols," and specifically identifies OCP as one such protocol. The motivation was to incorporate the known benefits of threading taught by OCP—such as supporting concurrent activity and prioritizing requests—into the high-performance NoC architecture of Rădulescu2004.
- Expectation of Success: A POSITA would have had a high expectation of success, as Rădulescu2004's stated compatibility with OCP ensured that its NoC could be interfaced with the protocol to achieve predictable results.

Prior Art Relied Upon: Weber (Application # 2002/0129173).
Core Argument for this Ground:
- Prior Art Mapping: Petitioner contended that Weber independently discloses all elements of the challenged claims. Weber describes an SoC communication system using a shared bus to connect functional blocks (processing modules). It teaches establishing "connections" with specific properties (e.g., quality of service, priority, ordering). Weber explicitly discloses that communication requests include both "thread identification information" (a Thread ID) and an "address (Addr) signal." Petitioner argued Weber teaches mapping these identifiers to connections; for example, a Thread ID is mapped to a connection identifier (CONNID) within an interface module to align the desired communication properties (like high priority for graphics data) with the properties of the established connection. This directly teaches mapping based on a "communication thread." Weber also teaches decoding an "external address portion of" the address signal to identify the target functional block, anticipating the "address range" limitation.
Additional Grounds: Petitioner asserted an additional obviousness challenge (Ground 4) for claims 1-7 based on Weber in view of Rădulescu2004, arguing a POSITA would have been motivated to replace Weber's shared bus with the more scalable NoC from Rădulescu2004 to improve system performance.

"interconnect means" (all claims): Petitioner identified this as a means-plus-function term under 35 U.S.C. §112, ¶ 6. The claimed function is "coupling said plurality of processing modules." Based on the specification, Petitioner argued the corresponding structure is any of a bus, switch, point-to-point wire, or network.
"mapping means" (claims 1, 7): Petitioner also identified this as a means-plus-function term. The claimed function is mapping a communication service to a connection based on communication properties and a service identifier. Petitioner argued the corresponding structure disclosed in the ’052 patent is an "adapter unit" (also called a "shell"), which may be located within a network interface.

Petitioner argued against discretionary denial under §325(d), noting that the primary prior art (Rădulescu2004, OCP, Weber) was never applied or substantively discussed by the examiner during prosecution. Therefore, the petition raises new arguments and art that warrant consideration.
Petitioner also argued against discretionary denial under Fintiv, stipulating that if the IPR is instituted, it will not pursue the same invalidity grounds in parallel district court litigations. Petitioner further asserted that the litigation is in an early stage and that the petition presents compelling evidence of unpatentability.

Petitioner requested the institution of an inter partes review and the cancellation of claims 1-7 of the ’052 patent as unpatentable.