PTAB

IPR2024-00552

Monolithic Power Systems Inc v. Greenthread LLC

Key Events

Petition

petition

Title: Semiconductor Device with Graded Dopant Region for Carrier Management
Brief Description: The ’222 patent is directed to a very-large-scale integration (VLSI) semiconductor device with layers having a graded dopant concentration. This grading is intended to create a drift electric field that sweeps minority carriers from the device’s active surface region towards its substrate to improve performance and reliability.

Prior Art Relied Upon: Kawagoe (Patent 6,043,114).
Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Kawagoe, which relates to semiconductor integrated circuit devices, teaches every element of the challenged claims. Kawagoe allegedly discloses a VLSI device comprising a p-type substrate with an epitaxial layer, an n-well (first active region), and a p-well (second active region). Transistors (PMOS and NMOS) are formed within these respective wells. Critically, Petitioner contended that Kawagoe discloses applying a graded dopant concentration to these wells, creating a downward gradient from the surface. This graded profile is taught to attract minority carriers toward the substrate, thereby reducing soft errors, which Petitioner asserted directly corresponds to the ’222 patent’s claimed function of aiding carrier movement.
- Key Aspects: This ground asserted that a single prior art reference, not considered during prosecution, rendered all challenged claims obvious by disclosing the same core structure for the same functional purpose.

Prior Art Relied Upon: Onoda (Japanese Application H8-279598).
Core Argument for this Ground:
- Prior Art Mapping: Petitioner asserted that Onoda, which describes a nonvolatile semiconductor storage device, independently renders the claims obvious. Onoda allegedly discloses a device with a p-type substrate comprising a heavily-doped base layer and a lightly-doped epitaxial layer. The structure includes both p-wells and n-wells containing NMOS and PMOS transistors, respectively, satisfying the limitations for first and second active regions. The petition argued that Onoda explicitly teaches and graphically depicts a graded dopant profile within its well regions. This graded profile, with dopant concentration decreasing with depth, is used to improve latch-up resistance—a known issue related to minority carrier movement. Petitioner contended this teaching made the claimed structure and its carrier-aiding function obvious.

Prior Art Relied Upon: Onoda (Japanese Application H8-279598) and Nishizawa (Patent 5,384,476).
Core Argument for this Ground:
- Prior Art Mapping: This ground used Onoda as the primary reference for disclosing the fundamental CMOS device structure with multiple active regions in separate wells. Petitioner argued Nishizawa was relevant for its explicit teaching of using a graded dopant profile in a buried region to deliberately create a drift electric field for the express purpose of sweeping minority carriers from the surface region down to the substrate.
- Motivation to Combine: Petitioner argued a person of ordinary skill in the art (POSITA) would combine these references because both address similar problems (unwanted minority carrier movement) in similar semiconductor memory devices. A POSITA would have been motivated to apply Nishizawa's explicit explanation of creating a carrier-sweeping drift field to the device structure in Onoda as a known technique to enhance carrier management and improve device reliability.
- Expectation of Success: A POSITA would have had a reasonable expectation of success in combining the references, as it involved applying a known principle (drift fields from graded doping) to a conventional device structure to achieve the predictable result of improved minority carrier control.

§314(a) / Fintiv: Petitioner argued that the Board should not exercise its discretion to deny institution, asserting that the petition presents compelling evidence of unpatentability. The argument highlighted that Onoda provides a strong single-reference obviousness ground and that the grounds based on Onoda and Nishizawa introduce new art and arguments not present in other pending IPRs filed against the ’222 patent.
§325(d) / Advanced Bionics: Petitioner contended that denial under §325(d) would be improper because the cited prior art (Kawagoe, Onoda, and Nishizawa) was not considered by the examiner during prosecution. The petition argued this art is not cumulative to the prosecution record, as it teaches relevant CMOS devices with graded dopants in a manner distinct from previously considered references like Rhodes.
General Plastic Factors: The petition asserted that factors related to serial petitions weigh against denial. Petitioner highlighted that it is a separate entity with no significant relationship to other petitioners challenging the ’222 patent, this is its only petition against these claims, and its filing was a direct response to being sued for infringement.

Petitioner requests institution of an inter partes review and cancellation of claims 1, 3-9, 13, 15-17, 20, 21, 24-28, 32-34, and 39-42 of the ’222 patent as unpatentable.