PTAB

IPR2024-00975

Innoscience America Inc v. Infineon Technologies Austria AG

Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Lateral Compound Semiconductor Device and Method for Producing the Same
  • Brief Description: The ’481 patent describes an electronic component featuring a lateral compound semiconductor transistor, such as a Gallium Nitride (GaN) device, configured in a specific packaging layout. The claimed design includes a die pad, three leads with specific electrical couplings, and a source sensing functionality to improve performance.

3. Grounds for Unpatentability

Ground 1: Claims 1-3, 5, 6, 10, 11, and 16 are obvious over Nega in view of Roberts.

  • Prior Art Relied Upon: Nega (Application # 2014/0110760) and Roberts (Application # 2014/0175454).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Nega disclosed a lateral GaN transistor device with a die pad (lead frame LF1), a first lead (for the control electrode), and a second lead (for a current electrode), fulfilling most limitations of independent claims 1 and 10. However, Nega allegedly failed to explicitly teach a third lead dedicated to source sensing. Petitioner contended that Roberts remedied this deficiency by disclosing a "Kelvin Source Sense" connection (lead SS) in a GaN transistor, which provides the claimed source sensing functionality. For claim 3, Roberts was cited for teaching the common high-voltage (600/650V) and high-frequency capabilities of such GaN devices.
    • Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine Roberts’s source sensing lead with Nega’s device to solve the well-known problem of inductive noise and unwanted switching in high-power applications. Roberts expressly taught that a Kelvin connection provides a cleaner drive signal, a known benefit that a POSITA would seek to apply to a standard device like Nega's.
    • Expectation of Success: A POSITA would have a high expectation of success, as adding a separate sensing lead was a known technique for improving transistor performance, and the combination involved applying known methods to yield predictable results.

Ground 2: Claims 4, 9, and 17 are obvious over Nega, Roberts, and Otremba124.

  • Prior Art Relied Upon: Nega (Application # 2014/0110760), Roberts (Application # 2014/0175454), and Otremba124 (Application # 2014/0225124).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground built upon the Nega-Roberts combination to address limitations in dependent claims 4, 9, and 17, which required specific leadless packaging features. These claims recite a housing where the lower surfaces of the die pad and leads are exposed and planar, and specifically conform to a "ThinPAK8x8" package outline. While Nega-Roberts supplied the core transistor circuit, Petitioner asserted that Otremba124 taught the claimed packaging. Otremba124 disclosed a GaN HEMT in a "ThinPAK8x8" package with exposed, planar lower contacts for the die pad and leads.
    • Motivation to Combine: A POSITA would be motivated to house the transistor of Nega-Roberts in the leadless package of Otremba124 to achieve known benefits. Petitioner argued that leadless packages like ThinPAK8x8 were known improvements over leaded packages (like Nega's TO220), offering advantages such as a smaller footprint, faster performance, and improved switching behavior.
    • Expectation of Success: Success would be expected because implementing a known circuit in an improved, standardized package was a routine design choice for a POSITA seeking to enhance device performance and reduce size.

Ground 3: Claims 1, 2, and 4-6 are obvious over Liu.

  • Prior Art Relied Upon: Liu (Patent 10,930,524).

  • Core Argument for this Ground:

    • Prior Art Mapping: Petitioner asserted that Liu, by itself, disclosed all elements of the challenged claims. Liu described a semiconductor component with a compound semiconductor chip (a Group III-nitride device, meeting claim 2), a die pad ("device receiving area 138"), and three leads with the claimed connectivity. Specifically, Liu’s gate contact was coupled to a first lead (26), its drain to the die pad, its source to a second lead (30), and it explicitly included a third lead (28) described as a "Kelvin lead," which Petitioner argued inherently provides the claimed source sensing functionality. Furthermore, Petitioner contended that figures in Liu showed the lateral device structure and the exposed, planar lower surfaces required by claim 4.
    • Motivation to Combine: As this ground was based on a single reference alleged to teach all limitations, the argument focused on direct mapping rather than a motivation to combine separate references. The combination of features was already present in Liu.
  • Additional Grounds: Petitioner asserted numerous additional obviousness challenges, primarily based on combinations of Nega or Liu with various other references. These grounds relied on similar theories, substituting or adding references to teach alternative packaging configurations (Otremba433), the use of contact clips instead of bond wires (Otremba280), and arrangements for multi-transistor switch circuits (Otremba631).

4. Arguments Regarding Discretionary Denial

  • Petitioner argued that discretionary denial under Fintiv would be improper. The parallel district court litigation was in its infancy, with no discovery, claim construction, or trial date set, representing minimal investment by the court and parties.
  • Petitioner also argued against denial under 35 U.S.C. §325(d), asserting that the primary prior art references (Nega, Roberts, Liu) were not before the examiner during prosecution and were not cumulative. These references allegedly taught key limitations—specifically a lateral transistor with its drain coupled to the die pad—that the Patent Owner had argued were absent from the art of record to overcome prior rejections.

5. Relief Requested

  • Petitioner requests institution of an inter partes review (IPR) and cancellation of claims 1-17 of the ’481 patent as unpatentable.