PTAB

IPR2025-00245

Micron Technology Inc v. Yangtze Memory Technologies Co Ltd

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Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Joint Opening Structures of Three-Dimensional Memory Devices and Methods for Forming the Same
  • Brief Description: The ’532 patent describes methods and structures for creating three-dimensional (3D) NAND memory devices by stacking two separate memory decks. The invention focuses on the joint opening structure that electrically connects a channel in the lower deck to a channel in the upper deck to form a continuous vertical memory channel.

3. Grounds for Unpatentability

Ground 1: Obviousness over Costa - Claims 1-3, 11, 13, 15-18, and 20 are obvious over Costa.

  • Prior Art Relied Upon: Costa (Application # 2018/0182771).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Costa, which was not considered during prosecution, discloses a multi-tier 3D memory device and method that teaches every element of the challenged claims. Costa describes forming a first memory stack, forming a channel through it, forming an inter-tier connection structure, forming a second memory stack on top, and forming a second channel that connects to the first via the inter-tier structure. The central point of novelty cited for allowance of the ’532 patent was a "third channel structure" (the inter-tier connection) having a lateral size larger than the top aperture of the first through hole. Petitioner contended Costa discloses this feature. Costa’s "joint-level doped semiconductor portion 173" is described as being able to "contact an entire top surface" of the underlying memory opening fill structure. Petitioner asserted that to achieve this goal and account for known misalignment in a non-self-aligned process, a person of ordinary skill in the art (POSITA) would have understood that this structure must be made wider than the underlying hole to provide an alignment margin.
    • Motivation to Modify: This ground is primarily based on inherency, but to the extent modification is needed, a POSITA would be motivated to make Costa's inter-tier connection structure wider than the underlying hole to solve known problems. These motivations included ensuring a reliable electrical connection despite process variations and misalignment, protecting the entire underlying fill structure (including sensitive memory layers) from damage during subsequent oxidation and etching steps, and simplifying the manufacturing process by providing a wider etch stop.
    • Expectation of Success: A POSITA would have a high expectation of success. Petitioner argued that widening an interface structure to create an "overlap margin" was a conventional, basic, and well-known practice in semiconductor fabrication to address misalignment and improve yield.

Ground 2: Obviousness over Costa in view of Oh - Claims 1-3, 11, 13, 15-18, and 20 are obvious over Costa in view of Oh.

  • Prior Art Relied Upon: Costa (Application # 2018/0182771) and Oh (Application # 2017/0154892).
  • Core Argument for this Ground:
    • Prior Art Mapping: This ground applied the same claim mapping for Costa as in Ground 1. Oh was introduced to provide an explicit teaching for widening the inter-tier connection structure, which Petitioner argued was the key limitation for patentability. Oh expressly addresses misalignment issues in multi-stack 3D memory structures, the same problem faced in Costa's device. Specifically, Oh teaches that a "channel connection pattern" between two memory decks "may have a larger width than the top surface of the first channel hole" in order "to secure an overlap margin."
    • Motivation to Combine: Petitioner argued a POSITA, starting with Costa's multi-deck structure and recognizing the inherent misalignment challenges of its non-self-aligned process, would combine it with the teachings of Oh. Oh addresses the exact same technical problem (misalignment between stacked channel holes) in the same field of art (3D NAND memory). Combining the teachings would be a straightforward application of Oh's solution—creating a wider interface structure for an "overlap margin"—to Costa's device to improve connection reliability and manufacturing yield.
    • Expectation of Success: A POSITA would have a high expectation of success in combining the references. Oh provides a clear, known solution to a known problem in Costa. Implementing this "overlap margin" was a conventional practice in semiconductor manufacturing, and as argued in Ground 1, it simplifies the overall fabrication process.

4. Arguments Regarding Discretionary Denial

  • Petitioner argued against discretionary denial under §314(a) based on the Fintiv factors. It asserted that the parallel district court litigation was in its infancy, particularly for the ’532 patent which was part of a later-asserted "Wave 3" group of patents. Petitioner also stipulated that it would not pursue the same invalidity grounds in the district court if the IPR is instituted, eliminating issue overlap.
  • Petitioner also argued that denial under §325(d) would be inappropriate because the primary prior art references, Costa and Oh, were not before the examiner during prosecution. These references are alleged to teach the very limitation—the wider third channel structure—that the examiner relied upon for allowance, suggesting the examiner lacked the most relevant art.

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-3, 11, 13, 15-18, and 20 of the ’532 patent as unpatentable.