PTAB

IPR2025-00499

Yangtze Memory Technologies Co Ltd v. Micron Technology Inc

Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Nonvolatile Memory Devices
  • Brief Description: The ’214 patent relates to three-dimensional (3D) nonvolatile memory devices, such as 3D NAND flash memory. The disclosed invention focuses on a device architecture where a common source is formed over the data lines and memory cells, which are in turn located above the substrate.

3. Grounds for Unpatentability

Ground 1: Anticipation/Obviousness over Lung - Claims 8 and 21

  • Prior Art Relied Upon: Lung (Application # US2011/0286283).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Lung discloses every limitation of independent claims 8 and 21. Lung describes a 3D NAND memory device with multiple device levels. Crucially, Lung’s architecture places a common source plane (147) over the word lines (410-418) and memory cells, which are themselves formed over bit lines (134-136) and a substrate. Petitioner contended this arrangement directly teaches the key limitation of the ’214 patent: forming memory cells between the common source and the substrate. Lung was also argued to disclose the control gates (word lines) with cavities, memory elements (charge storage structures) formed within those cavities, and conductive channels (semiconductor pillars) as required by the claims.
    • Key Aspects: Petitioner asserted that Lung teaches the very structure the Patent Owner relied upon during prosecution to overcome prior art rejections, specifically the vertical arrangement of the common source, memory cells, and substrate.

Ground 2: Obviousness over Park in view of Mokhlesi - Claims 8, 13, and 21

  • Prior Art Relied Upon: Park (Application # US2010/0120214) and Mokhlesi (Application # US2008/0242028).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Park discloses a conventional 3D NAND memory device with all claimed elements except for the vertical arrangement of the common source. In Park, the common source (impurity region 102) is a semiconductor layer located at the bottom of the device, on the substrate. Mokhlesi addresses a known problem with such bottom-source architectures: high resistance and current crowding in semiconductor sources. Mokhlesi expressly teaches reversing this arrangement so that "source lines may be formed on top and the bit lines may be formed on the bottom." This modification allows for the use of more conductive metal or silicide for the common source, directly solving the current crowding problem.
    • Motivation to Combine: A POSITA would combine Mokhlesi's teaching with Park's device to improve its reliability, an express goal of Park. Since Park’s semiconductor common source suffered from the exact current crowding problem identified by Mokhlesi, a POSITA would have been motivated to apply Mokhlesi's solution—moving the common source to the top and fabricating it from metal/silicide—to achieve the predictable benefit of reduced resistance and improved performance.
    • Expectation of Success: A POSITA would have had a high expectation of success, as the combination involved applying a known technique to a conventional 3D memory architecture to solve a well-understood problem and achieve a predictable result.

Ground 3: Obviousness over Fukuzumi in view of Mokhlesi - Claims 8 and 21

  • Prior Art Relied Upon: Fukuzumi (Application # US2009/0146190) and Mokhlesi (Application # US2008/0242028).
  • Core Argument for this Ground:
    • Prior Art Mapping: The argument mirrors that of Ground 2. Petitioner asserted that Fukuzumi, like Park, discloses a standard 3D NAND architecture with a semiconductor common source (p-well region Ba1) located at the bottom of the device stack. This structure is susceptible to the same current crowding issues Mokhlesi addresses. The combination of Fukuzumi with Mokhlesi’s teaching to place a metal/silicide common source at the top and bit lines at the bottom would result in the structure claimed in the ’214 patent.
    • Motivation to Combine: The motivation is identical to that in the combination with Park. Fukuzumi aims to solve problems in transitioning memory from 2D to 3D, and a POSITA would have recognized that the current crowding in Fukuzumi's bottom-source design was a key reliability issue. Applying Mokhlesi's express teaching to move the source to the top would be a straightforward and logical step to enhance the performance and reliability of Fukuzumi’s device.
    • Expectation of Success: Success would be predictable, as the modification applies an established solution for a known problem to a similar, conventional 3D memory device.

4. Key Claim Construction Positions

  • Petitioner noted that the term "cavity" is at issue in a related district court case. Petitioner proposed a construction of "a [first-fourth] hole with a larger diameter than holes in the layers immediately above and below the [first/second] control gate." However, Petitioner argued that the asserted prior art discloses the "cavity" limitation under its proposed construction, the Patent Owner's plain and ordinary meaning position, and any other reasonable construction.

5. Arguments Regarding Discretionary Denial

  • §325(d): Petitioner argued that discretionary denial is improper because the primary references asserted (Lung, Park, Mokhlesi, and Fukuzumi) were never presented to or considered by the Examiner during the original prosecution of the ’214 patent.
  • §314(a) (Fintiv): Petitioner argued that discretionary denial under Fintiv is unwarranted. There is no currently pending parallel district court litigation asserting the ’214 patent. Although the Patent Owner has filed a motion to reassert the patent in a case from which it was previously dismissed, that motion has not been decided. Petitioner contended that these "exceptional circumstances" and the early stage of the potential litigation weigh against denial.

6. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 8, 13, and 21 of Patent 8,803,214 as unpatentable.