Taiwan Semiconductor Mfg Co Ltd v. Advanced Integrated Circuit Process LLC

1. Case Identification

• Case #: IPR2025-00830
• Patent #: 8,253,180
• Filed: April 15, 2025
• Petitioner(s): Taiwan Semiconductor Manufacturing Company Ltd.
• Patent Owner(s): Advanced Integrated Circuit Process LLC
• Challenged Claims: 1-22

2. Patent Overview

• Title: Semiconductor Device and Manufacturing Method
• Brief Description: The ’180 patent discloses a metal insulator semiconductor field-effect transistor (MISFET) designed to improve driving power and reliability. The purported invention involves extending a high-dielectric-constant (high-k) gate insulating film to beneath an insulating sidewall adjacent to the gate electrode.

3. Grounds for Unpatentability

Ground 1: Obviousness over Kamata - Claims 1-3, 5-6, 13-19, and 21-22 are obvious over Kamata.

• Prior Art Relied Upon: Kamata (Application # 2002/0063299).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Kamata, which relates to semiconductor devices, discloses all limitations of the challenged claims. Specifically, Kamata’s various embodiments depict a transistor with a high-k gate insulating film (film 2) formed on a substrate (substrate 1), a gate electrode (electrode 3) formed on the insulating film, and a multi-layer insulating sidewall (films 4 and 5) on the side of the gate electrode. Crucially, Kamata’s figures show the gate insulating film extending continuously from under the gate electrode to partially under the insulating sidewall, with its end located at a predetermined distance inward from the sidewall’s outer edge. This structure, determined by Kamata’s manufacturing process, was asserted to meet the key limitations of independent claim 1.
  • Motivation to Combine (for §103 grounds): Not applicable as this is a single-reference ground. Petitioner contended that a person of ordinary skill in the art (POSITA) would have found it obvious to use Kamata's disclosed structures, including selecting known materials like Hf-based oxides for the high-k film (claim 6) or forming a tapered film end (claims 5, 21-22) as shown in Kamata’s ninth embodiment.
  • Expectation of Success (for §103 grounds): A POSITA would have had a high expectation of success as Kamata teaches the specific structures and materials, and their fabrication was well within the skill of the art.

Ground 2: Obviousness over Guha - Claims 1-6, 12-14, 16-18, and 21-22 are obvious over Guha.

• Prior Art Relied Upon: Guha (Application # 2006/0091432).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner asserted that Guha independently discloses all limitations of independent claim 1 and its dependents. Guha’s Figure 12 device includes a high-k dielectric layer (layer 15) on a substrate, a gate electrode (gate 17), and an insulating sidewall structure composed of gate spacers (spacer 16) and isolating spacers (spacer 7). The dielectric layer is shown extending continuously from under the gate electrode to under the gate spacer portion of the sidewall. Petitioner argued that the end of this dielectric layer is disposed at a predetermined distance inward from the outer edge of the full sidewall (spacer 7), thereby meeting the limitations of claim 1.
  • Motivation to Combine (for §103 grounds): Not applicable as this is a single-reference ground. Petitioner argued Guha teaches using Hf-based oxides for the dielectric layer, which has a dielectric constant above 10, satisfying claims 6 and 18. Guha’s description of the dielectric layer’s rounded or tapered edge was argued to render claims 5, 21, and 22 obvious.
  • Expectation of Success (for §103 grounds): A POSITA would have had an expectation of success in implementing Guha’s teachings, which describe conventional materials and fabrication techniques for achieving the claimed structure.

Ground 3: Obviousness over Matsumoto - Claims 1, 5, and 13-20 are obvious over Matsumoto.

• Prior Art Relied Upon: Matsumoto (Application # 2003/0025135).

• Core Argument for this Ground:

  • Prior Art Mapping: Petitioner contended that Matsumoto’s fourth embodiment MOSFET discloses the elements of claim 1. Matsumoto shows a high-k gate insulating film (film 6) extending from under a gate electrode (electrode 7) to under an inner portion (film 8) of a multi-layer insulating sidewall (films 8, 40, and 9). The manufacturing process described in Matsumoto results in the end of the insulating film being located at a predetermined distance inward from the outer edge of the complete sidewall (film 9), satisfying the core limitations of claim 1. Matsumoto’s disclosure of a thinner film portion under the sidewall than under the gate electrode was argued to create a "convex cross-sectional shape," rendering claim 20 obvious.
  • Motivation to Combine (for §103 grounds): Not applicable as this is a single-reference ground.
  • Expectation of Success (for §103 grounds): A POSITA would have reasonably expected to successfully build the device described in Matsumoto using the disclosed fabrication steps.

• Additional Grounds: Petitioner asserted numerous additional obviousness challenges combining the primary references (Kamata, Guha, Matsumoto) with secondary art. These grounds targeted individual dependent claims by adding specific, well-known features. For example, Kamata was combined with Wang (Application # 2005/0093084) for claims 4 and 12 to teach a buffer film with the same footprint as the high-k film; with Rodder (Patent 6,306,712) for claims 8-9 to add specific pocket and extension regions; and with Takayanagi (Patent 6,664,577) for claim 20 to teach a convex-shaped gate insulating film.

4. Arguments Regarding Discretionary Denial

• Petitioner argued that discretionary denial would be inappropriate under both 35 U.S.C. §314(a) and §325(d).
• To address Fintiv factors under §314(a), Petitioner stipulated that if the IPR is instituted, it will not pursue in the related district court litigation any ground that it raised or reasonably could have raised in the IPR.
• Regarding §325(d), Petitioner argued that the primary references relied upon in the petition were never applied by the Examiner during prosecution. Even where a similar reference was cited in an IDS (Matsumoto-185), it was not evaluated by the Examiner, and the Office erred in allowing the claims over it. Petitioner contended the petition presents a compelling case of unpatentability based on evidence not previously considered by the Office.

5. Relief Requested

• Petitioner requests institution of an inter partes review and cancellation of claims 1-22 of Patent 8,253,180 as unpatentable.