PTAB

IPR2025-00995

Samsung Electronics Co Ltd v. W&Wsens Devices Inc

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Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Single-Chip Microstructure-Enhanced Photodetector
  • Brief Description: The ’543 patent discloses a single-chip semiconductor device that monolithically integrates a microstructure-enhanced photodetector (MSPD) with active electronic circuitry, such as CMOS signal processing circuits, on a single substrate. The MSPD features intentionally formed holes or pores that pass through its semiconductor layers to increase light absorption and enhance quantum efficiency.

3. Grounds for Unpatentability

Ground 1: Claims 1-4, 7, 9-12, 16-17, 20-21, 24-26, 28-30, 32, and 35 are anticipated by and/or obvious over Kuboi.

  • Prior Art Relied Upon: Kuboi (Application # 2012/0049044).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Kuboi, which was not considered during prosecution, discloses every limitation of the challenged claims, either expressly or inherently, making them anticipated under 35 U.S.C. §102. In the alternative, Petitioner contended that any element not explicitly disclosed would have been an obvious modification to a person of ordinary skill in the art (POSITA), making the claims obvious under 35 U.S.C. §103.
      • The core of the argument mapped Kuboi’s "CMOS solid-state imaging device 201" to the claimed "single-chip device." This device in Kuboi includes a pixel region and a peripheral circuit portion fabricated on a single semiconductor "substrate 211."
      • Petitioner asserted that Kuboi’s "photoelectric conversion portion 14," which comprises a silicon semiconductor layer with etched vertical "holes 38" and embedded organic material films, corresponds to the claimed "microstructure-enhanced photodetector (MSPD)." The holes enhance light absorption, meeting a key functional aspect of the MSPD.
      • The "peripheral circuit portion" of Kuboi’s device, which includes CMOS logic circuits like a vertical driving circuit and column signal processing circuits, was mapped to the claimed "active electronic circuit." Petitioner argued this circuitry is integrated on the same substrate as the photodetector and is configured for reverse-bias operation, as Kuboi discloses applying a voltage bias between an upper electrode and a lower electrode to create a depletion layer.
      • For dependent claims, Petitioner provided detailed mappings. For example, claim 4’s "superstrate" was mapped to Kuboi's light shielding film 19, which is formed on top of the stacked photodetector regions and contains holes. Claim 26’s "light guide" was mapped to the on-chip microlens disclosed by Kuboi, which functions to direct light onto the photodetector.
    • Motivation to Combine (for §103 grounds): The obviousness arguments were presented as alternatives for limitations Petitioner believed were already disclosed by Kuboi. For instance, regarding claim 2 (active circuit extending "beyond said substrate"), Petitioner argued that a POSITA would have been motivated to use conventional CMOS processes that include forming metal interconnect wiring layers above the substrate to connect transistors within the active electronic circuit. This was a well-known technique to ease layout and signal distribution. For claim 16 (holes with sloped sidewalls), Petitioner argued a POSITA would be motivated to use the Bosch process, which Kuboi explicitly suggests, to create concavo-convex hole shapes to increase the interface area and improve device sensitivity.
    • Expectation of Success (for §103 grounds): Petitioner asserted that a POSITA would have had a reasonable expectation of success in making any required modifications. The proposed modifications, such as adding standard above-substrate wiring or using a known etching process like the Bosch process mentioned by Kuboi, relied on conventional, well-understood semiconductor fabrication techniques with predictable results.

4. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-4, 7, 9-12, 16-17, 20-21, 24-26, 28-30, 32, and 35 of Patent 10,468,543 as unpatentable.