PTAB

IPR2025-01321

Samsung Electronics Co Ltd v. Radian Memory Systems LLC

Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Cooperative Management of Flash Memory
  • Brief Description: The ’772 patent describes a system for managing NAND flash memory where responsibility is shared between a host and a solid-state drive (SSD) controller. The technology involves organizing the memory into "zones" and providing metadata from the SSD to the host to enable host-initiated memory management and maintenance operations.

3. Grounds for Unpatentability

Ground 1: Claims 1-6, 8, 11-13, 15-20, 22, 25-30 are obvious over Olbrich in view of Yamada and NVMe1.0b

  • Prior Art Relied Upon: Olbrich (Patent 8,386,700), Yamada (Application # 2011/0271032), and NVMe1.0b (NVM Express Base Specification Rev. 1.0b).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Olbrich taught the core structure of the claimed SSD. Olbrich’s “SuperBlocks,” which group erase blocks from different memory banks and dies, were alleged to be analogous to the claimed “zones” comprising erase units on different planes. Olbrich also disclosed generating and tracking metadata for these SuperBlocks, such as "Erase Count" and timestamps, which maps to the metadata generation limitations. To address the cooperative host-controller management aspect, Petitioner contended that Yamada taught a controller that sends a “maintenance request” to a host based on metadata analysis (e.g., error counts), thereby making a maintenance recommendation available to the host.
    • Motivation to Combine: A POSITA would combine Olbrich and Yamada because both references address improving the performance and longevity of NAND flash memory systems using metadata. Petitioner argued that a POSITA would be motivated to incorporate Yamada's host-initiated maintenance functionality into Olbrich's efficient memory architecture to gain the benefits of shared control. Further, because Olbrich was designed to operate with various storage protocols, a POSITA would have been motivated to incorporate the then-operative NVMe1.0b standard to ensure broad interoperability and compatibility.
    • Expectation of Success: Petitioner asserted that a POSITA would have had a reasonable expectation of success, as Olbrich’s flexible architecture was capable of ready modification to include the discrete maintenance modules taught by Yamada, and implementing a standard protocol like NVMe was a routine engineering task.

Ground 2: Claims 1-6 are obvious over Gonzalez in view of Goss and NVMe1.0b

  • Prior Art Relied Upon: Gonzalez (Application # 2010/0049908), Goss (Application # 2011/0302477), and NVMe1.0b.

  • Core Argument for this Ground:

    • Prior Art Mapping: Petitioner asserted that Gonzalez taught a memory system organized into "metablocks," where each metablock includes physical blocks from different planes to increase parallelism. This structure was argued to meet the "zones" limitation of claim 1. Gonzalez also disclosed generating metadata based on host accesses and maintenance activities. Petitioner then argued that Goss supplied the missing element of host notification, teaching that a controller can provide "real-time notifications to a host" regarding the status of the memory array (e.g., based on wear history) to allow the user to take affirmative maintenance steps.
    • Motivation to Combine: A POSITA would combine Gonzalez and Goss because they address the same problem of managing flash memory using metadata. Petitioner argued that since Gonzalez already taught a system where management responsibilities could be distributed between the host and controller, it would have been a logical and predictable step to incorporate Goss's specific controller-to-host notification mechanism to further enhance the system's reliability. As in Ground 1, the motivation to add NVMe1.0b was to comply with a widely adopted industry standard for NAND flash memory devices.
    • Expectation of Success: Petitioner contended that success was reasonably expected because adding a controller notification function (from Goss) to a system already designed for distributed control (Gonzalez) would have been a straightforward and routine modification for a POSITA.
  • Additional Grounds: Petitioner asserted additional obviousness challenges based on the Gonzalez/Goss/NVMe1.0b combination, supplemented by individual references (Ban, Sprouse, Son, Cornwell) to teach specific limitations in dependent claims related to address construction, multi-die configurations, metadata types, and failure detection reporting.

4. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-6, 8, 11-13, 15-20, 22, and 25-30 of the ’772 patent as unpatentable under 35 U.S.C. §103.