PTAB

IPR2026-00065

Taiwan Semiconductor Mfg Co Ltd v. MYW Semitech LLC

Log In
Key Events
Petition

1. Case Identification

2. Patent Overview

  • Title: Chip Package
  • Brief Description: The ’768 patent relates to a multi-component semiconductor chip package. The claimed technology centers on a structure comprising a first polymer layer (interposer) with specific physical properties, vertical metal plugs within through vias, and multi-layered interconnection schemes formed over the polymer layer to connect various semiconductor chips.

3. Grounds for Unpatentability

Ground 1: Claims 1-15 and 20 are obvious over Sundaram, Haba, and Lin-191

  • Prior Art Relied Upon: Sundaram (Patent 9,167,694), Haba (Patent 8,709,933), and Lin-191 (Application # 2010/0290191).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that Sundaram teaches the foundational chip package, including a polymer interposer with first and second surfaces, vertical metal plugs (through vias), and polymer-metal redistribution layers (RDLs) forming an interconnection scheme. However, Sundaram’s polymer layer does not explicitly disclose the claimed low coefficient of thermal expansion (CTE). Haba was asserted to supply this missing element, teaching a polymeric dielectric layer with a CTE in the claimed range of 3-10 ppm/°C. For limitations related to the specific multi-layered composition of metal interconnects (e.g., a first metal layer with third and fourth copper layers thereon), Petitioner relied on Lin-191, which discloses such structures for creating reliable interconnects.
    • Motivation to Combine: A POSITA would combine Haba’s low-CTE polymer with Sundaram’s package to solve the well-known problem of thermal stress caused by CTE mismatch between a polymer interposer and silicon chips. Similarly, a POSITA would incorporate Lin-191's multi-layer metallization techniques into Sundaram’s interconnects to improve electrical conductivity, mitigate copper diffusion, and enhance electromigration resistance, all of which are known benefits desirable in high-density packaging.
    • Expectation of Success: Petitioner contended that success was expected because the combination involved applying known solutions (low-CTE polymers, layered interconnects) to address known problems in a standard chip package architecture, yielding only predictable improvements in thermal and electrical performance.

Ground 2: Claims 1-3, 5, 7-10, and 14-15 are obvious over Haba and Lin-191

  • Prior Art Relied Upon: Haba (Patent 8,709,933) and Lin-191 (Application # 2010/0290191).
  • Core Argument for this Ground:
    • Prior Art Mapping: In this ground, Haba was used as the primary reference, teaching a microelectronic assembly with an interconnection component (a first polymer layer) containing copper posts (metal plugs) and an RDL (a first interconnection scheme). While Haba teaches a polymer layer, it does not disclose a thickness within the claimed 100-300 micrometer range. Lin-191 was introduced to teach a polymer substrate with an overlapping thickness range (e.g., 10-150 micrometers or 20-500 micrometers), rendering the claimed range obvious. Lin-191 was also used to provide the detailed multi-layer structure of the metal interconnects not specified in Haba.
    • Motivation to Combine: A POSITA would have found it obvious to modify Haba’s polymer layer thickness based on Lin-191’s teachings as a simple design choice. A thicker layer, as suggested by the combination, would improve thermal management and provide greater design flexibility for routing additional interconnection layers, which were known benefits. The motivation to add Lin-191’s multi-layer interconnects was to enhance the reliability and performance of Haba’s package, consistent with the arguments in Ground 1.
    • Expectation of Success: Success was expected because adjusting substrate thickness was a routine parameter for a POSITA, and polymer RDLs were well-known and commonly manufactured within the claimed thickness range.

Ground 3: Claims 16-17, 19, and 22-28 are obvious over Yu and Lin-191

  • Prior Art Relied Upon: Yu (Patent 9,123,763) and Lin-191 (Application # 2010/0290191).

  • Core Argument for this Ground:

    • Prior Art Mapping: Petitioner asserted that Yu discloses the preamble of independent claim 16 by teaching a Package-on-Package (PoP) structure. Yu’s package includes a molding compound (the first polymer layer) containing through-mold vias (TMVs), which function as the claimed metal plugs. Yu also teaches an RDL structure that forms the first interconnection scheme. As in the other grounds, Lin-191 was relied upon to teach specific unclaimed features of the primary reference, namely the polymer layer thickness of 100-300 micrometers and the multi-layered composition of the metal interconnects.
    • Motivation to Combine: A POSITA would combine Lin-191’s teachings on polymer thickness with Yu’s molding compound to provide advantageous stress buffering, which was known to be appropriate for protecting the embedded die architecture taught in Yu. The combination would also predictably allow for the incorporation of additional shielding layers within the package.
    • Expectation of Success: Petitioner argued that a POSITA would have had a reasonable expectation of success because applying a common thickness for molding/encapsulation layers (from Lin-191) to Yu's package was a straightforward modification using well-established manufacturing techniques to achieve a predictable result.

  • Additional Grounds: Petitioner asserted additional obviousness challenges based on combinations including Sundaram and Lin-191; Haba, Lin-191, and Sundaram; Yu, Lin-191, and Camacho; and Yu, Lin-191, and Haba. These grounds relied on similar motivations to combine and design choice rationales to supply missing claim elements.

4. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-28 of Patent 11,107,768 as unpatentable.