US 6,574,759 B1
Method for verifying and improving run-time of a memory testGeneral
US 6,574,759 B1
Method for verifying and improving run-time of a memory test
Tech Center:
2100 Computer Architecture and Software
Examiner:
Albert Decady
Art Unit:
2133 Memory Access and Control
Agent:
Inventors:
Steven Cameron Woo; John Philip Privitera; Mark Alan Horowitz
Assignee:
FTE EXCHANGE, LLC
Priority:
01/18/00
Filed:
01/18/00
Granted:
06/03/03
Expiration:
01/18/20
Abstract
A method of generating and verifying a memory test is disclosed. A simulator is used to verify that the sequence of time-ordered commands complies with a set of operating constraints for the memory. A packer may thereafter be used to optimize run time of the verified test.