US 7,250,360 B2
Single step, high temperature nucleation process for a lattice mismatched substrateGeneral
US 7,250,360 B2
Single step, high temperature nucleation process for a lattice mismatched substrate
Tech Center:
2800 Semiconductors/Memory, Circuits/Measuring and Testing, Optics/Photocopying, Printing/Measuring and Testing
Examiner:
David Nhu
Art Unit:
2818 Semiconductors/Memory
Inventors:
James R. Shealy; Joseph A. Smart
Assignee:
NAVY, SECRETARY OF THE UNITED STATES OF AMERICA
Priority:
03/02/05
Filed:
03/02/05
Granted:
07/31/07
Expiration:
07/04/25
Abstract
A single step process for nucleation and subsequent epitaxial growth on a lattice mismatched substrate is achieved by pre-treating the substrate surface with at least one group III reactant or at least one group II reactant prior to the introduction of a group V reactant or a group VI reactant. The group III reactant or the group II reactant is introduced into a growth chamber at an elevated growth temperature to wet a substrate surface prior to any actual crystal growth. Once the pre-treatment of the surface is complete, a group V reactant or a group VI reactant is introduced to the growth chamber to commence the deposition of a nucleation layer. A buffer layer is then grown on the nucleation layer providing a surface upon which the epitaxial layer is grown preferably without changing the temperature within the chamber.
Cooperative Patent Classification (CPC)
H01H01L21/02378H01L