US 7,777,557 B2 | BOOSTER CIRCUIT

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US 7,777,557 B2

BOOSTER CIRCUIT

Tech Center:

2800 Semiconductors/Memory, Circuits/Measuring and Testing, Optics/Photocopying, Printing/Measuring and Testing

Examiner:

Jeffrey S Zweizig

Art Unit:

2816 Semiconductors/Memory

Agent:

McDermott Will & Emery LLP

Inventors:

Seiji YAMAHIRA

Assignee:

ADVANCED MEMORY TECHNOLOGIES LLC

Priority:

01/17/08

Filed:

01/17/08

Granted:

08/17/10

Expiration:

06/12/28

Abstract

A boosting circuit comprises a first boosting cell row and a second boosting cell row. The boosting circuit further comprises an analog comparison circuit for comparing the potential of boosting cells on the same stage, and selecting and outputting the lower or higher of the potentials. The potential of an N well is controlled using the output potential of the analog comparison circuit. Thereby, the amplitude of an N well potential can be suppressed, and a single N well region can be shared.

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