US 7,826,243 B2
Multiple chip module and package stacking for storage devicesGeneral
US 7,826,243 B2
Multiple chip module and package stacking for storage devices
Tech Center:
2800 Semiconductors/Memory, Circuits/Measuring and Testing, Optics/Photocopying, Printing/Measuring and Testing
Examiner:
Dang T Nguyen
Art Unit:
2825 Semiconductors/Memory
Agent:
Inventors:
Rey Bruce; Ricardo Bruce; Patrick Digamon Bugayong; Joel Alonzo Baylon
Assignee:
Priority:
12/29/05
Filed:
12/29/05
Granted:
11/02/10
Expiration:
01/15/28
Abstract
Stacking techniques are illustrated in example embodiments of the present invention wherein semiconductor dies are mounted in a module to become a MCM which serves as the basic building block. A combination of these modules and dies in a substrate creates a package with specific function or a range of memory capacity. Several example system configurations are provided using BGA and PGA to illustrate the stacking technique. Several pin assignment and signal routing techniques are illustrated wherein internal and external signals are routed from main board to various stacked modules. Expansion can be done both on the vertical and horizontal orientations.
Cooperative Patent Classification (CPC)
H01H01L2924/01079H01L