US 8,239,611 B2
RELOCATING DATA IN A MEMORY DEVICE
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US 8,239,611 B2
RELOCATING DATA IN A MEMORY DEVICE
Tech Center:
2100 Computer Architecture and Software
Examiner:
Kevin Ellis
Art Unit:
2189 Computer Architecture and I/O
Inventors:
Walter Allen; Robert France
Priority:
12/28/07
Filed:
12/28/07
Granted:
08/07/12
Expiration:
02/23/29
Abstract
Systems and methods that can facilitate more optimized relocation of data associated with a memory are presented. In addition to a memory controller component, a memory manager component can be employed to increase available processing resources to facilitate more optimal execution of higher level functions. Higher level functions can be delegated to the memory manager component to allow execution of these higher level operations with reduced or no load on the memory controller component resources. A uni-bus or multi-bus architecture can be employed to further optimize data relocation operations. A first bus can be utilized for data access operations including read, write, erase, refresh, or combinations thereof, among others, while a second bus can be designated for higher level operations including data compaction, error code correction, wear leveling, or combinations thereof, among others.
Cooperative Patent Classification (CPC)
G06G06F2212/1036G06F

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