Local interconnect structures for high density

A local interconnect structure is provided that includes a gate-directed local interconnect coupled to an adjacent gate layer through a diffusion-directed local interconnect.

SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers-characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs -of only field-effect components-of only insulated-gate FETs [IGFET]

INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

ELECTRIC ELEMENTS

Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof-Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof -Manufacture of specific parts of devices defined in group H01L21/70 -Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics-characterised by the formation and the after-treatment of the conductors -Local interconnects; Local pads, as exemplified by patent document EP0896365

SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10 

Details of semiconductor or other solid state devices -Arrangements for conducting electric current within the device in operation from one component to another ; , i.e. interconnections, e.g. wires, lead frames -including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body-Layout of the interconnection structure

Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers-Manufacture or treatment-Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs-the components including insulated gates, e.g. IGFETs-Manufacturing their interconnections or electrodes, e.g. source or drain electrodes

Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers-Manufacture or treatment-characterised by using material-based technologies-using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology-using silicon technology, e.g. SiGe

Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00-Technical content checked by a classifier-Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00

Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers-Manufacture or treatment-Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs-the components including insulated gates, e.g. IGFETs-Manufacturing their isolation regions

Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof-Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof -Manufacture of specific parts of devices defined in group H01L21/70 -Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics-characterised by the formation and the after-treatment of the conductors -Barrier, adhesion or liner layers

Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00-Integrated device layouts

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