US 9,147,747 B2
SEMICONDUCTOR STRUCTURE WITH HARD MASK DISPOSED ON THE GATE STRUCTURE
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US 9,147,747 B2
SEMICONDUCTOR STRUCTURE WITH HARD MASK DISPOSED ON THE GATE STRUCTURE
Tech Center:
2800 Semiconductors/Memory, Circuits/Measuring and Testing, Optics/Photocopying, Printing/Measuring and Testing
Examiner:
Andy Huynh
Art Unit:
2818 Semiconductors/Memory
Agent:
Winston Hsu, Scott Margo
Inventors:
Chih-Sen Huang; Ching-Wen Hung
Priority:
05/02/13
Filed:
05/02/13
Granted:
09/29/15
Expiration:
06/06/33
Abstract
The present invention provides a manufacturing method of a semiconductor structure, comprising the following steps. First, a substrate is provided, a first dielectric layer is formed on the substrate, a metal gate is disposed in the first dielectric layer and at least one source/drain region (S/D region) is disposed on two sides of the metal gate, a second dielectric layer is then formed on the first dielectric layer, a first etching process is then performed to form a plurality of first trenches in the first dielectric layer and the second dielectric layer, wherein the first trenches expose each S/D region. Afterwards, a salicide process is performed to form a salicide layer in each first trench, a second etching process is then performed to form a plurality of second trenches in the first dielectric layer and the second dielectric layer, and the second trenches expose the metal gate.
Cooperative Patent Classification (CPC)
H01H01L21/76897H01L

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