US 9,535,490 B2
Power saving techniques in computing devicesGeneral
US 9,535,490 B2
Power saving techniques in computing devices
Tech Center:
2100 Computer Architecture and Software
Examiner:
Zahid Choudhury
Art Unit:
2116 Computer Error Control, Reliability, & Control Systems
Inventors:
Uppinder Singh Babbar; Muralidhar Coimbatore Krishnamoorthy; Vinod Harimohan Kaushik; Andrei Danaila; Neven Klacar; Arunn Coimbatore Krishnamurthy; Vanitha Aravamudhan Kumar; Alok Mitra; Hariharan Sukumar; Vaibhav Kumar; Shailesh Maheshwari; Roshan Thomas Pius
Assignee:
Priority:
12/16/13
Filed:
12/12/14
Granted:
01/03/17
Expiration:
04/14/34
Abstract
Aspects disclosed in the detailed description include power saving techniques in computing devices. In particular, as data is received by a modem processor in a computing device, the data is held until the expiration of a modem timer. The data is then passed to an application processor in the computing device over a peripheral component interconnect express (PCIe) interconnectivity bus. On receipt of the data from the modem processor, the application processor sends data held by the application processor to the modem processor over the PCIe interconnectivity bus. The application processor also has an uplink timer. If no data is received from the modem processor before expiration of the uplink timer, the application processor sends any collected data to the modem processor at expiration of the uplink timer. However, if data is received from the modem processor, the uplink timer is reset.
Cooperative Patent Classification (CPC)
H04H04W52/0251H04WG06F1/3253G06FY02D10/00Y02D