DCT

0:26-cv-00515

TurboCode LLC v. Multi Tech Systems Inc

Key Events
Complaint
complaint

I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 0:26-cv-00515, D. Minn., 01/21/2026
  • Venue Allegations: Venue is asserted based on Defendant's incorporation and principal place of business being located within the District of Minnesota.
  • Core Dispute: Plaintiff alleges that Defendant’s cellular communications products that comply with 4G/LTE standards infringe a patent related to high-speed turbo code decoder architecture.
  • Technical Context: The technology involves forward error correction, a critical component in wireless communication systems like 4G/LTE that enables reliable data transmission over noisy channels.
  • Key Procedural History: The patent-in-suit was the subject of an Ex Parte Reexamination, which concluded with the issuance of a Reexamination Certificate on February 10, 2009. The asserted claim, Claim 6, was amended during this proceeding, which may introduce arguments related to claim scope and prosecution history estoppel.

Case Timeline

Date Event
2001-01-02 ’742 Patent Priority Date
2004-11-02 ’742 Patent Issue Date
2006-07-13 Reexamination request filed for ’742 Patent
2009-02-10 Ex Parte Reexamination Certificate issued for ’742 Patent
2019-11-01 Accused mPower MTR 5.1.1 Product Release
2021-11-01 Accused mPower MTR 5.3.5 Product Release
2026-01-21 Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 6,813,742 - "High Speed Turbo Codes Decoder for 3G Using Pipelined SISO Log-Map Decoders Architecture"

The Invention Explained

  • Problem Addressed: The patent's background describes the challenge of implementing computationally intensive error correction algorithms, such as the Maximum a Posteriori (MAP) algorithm, in semiconductor (ASIC) devices for mobile communications. Such implementations were often costly, power-hungry, and too slow for emerging 3G data rates (Compl. Ex. 1, '742 Patent, col. 1:45-61).
  • The Patented Solution: The invention proposes a decoder architecture using two pipelined and serially concatenated "Soft-In/Soft-Out" (SISO) Log-MAP decoders. These decoders are connected in a feedback loop with interleaver and de-interleaver memory modules, allowing for iterative decoding where data is passed back and forth to improve accuracy. This pipelined approach, illustrated in the system block diagram of Figure 4, is designed to achieve higher data throughput and be simpler to implement in hardware by using binary adders instead of more complex multiplier circuits ('742 Patent, col. 2:31-56, FIG. 4).
  • Technical Importance: This architecture aimed to provide a practical and efficient method for implementing powerful turbo codes in mass-market devices like 3G mobile phones, balancing performance with the constraints of cost and power consumption ('742 Patent, col. 2:31-40).

Key Claims at a Glance

  • The complaint asserts independent claim 6, as amended by the Ex Parte Reexamination Certificate (Compl. ¶¶10-11).
  • Essential elements of Claim 6 include:
    • Providing an input buffer with at least three shift registers to generate first, second, and third shifted input signals.
    • Providing first and second soft decision decoders serially coupled in a circular circuit, with specific inputs from the buffer.
    • Providing at least one memory module coupled to the decoders' outputs, where the output of the second decoder's memory module is fed back to the first decoder's input.
    • Processing systematic and extrinsic information data using a MAP probability algorithm and/or logarithm approximation algorithm.
    • Generating a soft decision based on a MAP probability algorithm and/or logarithm approximation algorithm.
    • Weighing and storing soft decision information into the corresponding memory module.
    • Performing iterative decoding for a predetermined number of times, where an output from the last decoder is fed back to the first in a circular circuit.

III. The Accused Instrumentality

Product Identification

  • The Accused Instrumentalities are various versions of Defendant's mPower MTR cellular routers, including models MTR 5.1.1 through 5.3.5 (Compl. ¶10).

Functionality and Market Context

  • The complaint alleges these products are designed to comply with 4G/LTE standards as defined by the 3rd Generation Partnership Project (3GPP) specifications (releases 8-13) (Compl. ¶10). Their core accused functionality is the method of receiving and decoding wireless data according to these standards, which mandate the use of turbo codes for error correction. The complaint provides changelogs for the accused products, indicating their support for 4G-LTE communications. For example, a changelog for mPower MTR 5.1.1 notes new hardware support for "4G-LTE Category 4 North America" models (Compl. p. 8).

IV. Analysis of Infringement Allegations

’742 Patent Infringement Allegations

Claim Element (from Independent Claim 6) Alleged Infringing Functionality Complaint Citation Patent Citation
...providing first and second soft decision decoders serially coupled in a circular circuit... The accused products implement first and second soft decision decoders connected in series, processing soft information from each other in a looped manner for iterative feedback, as required by the 4G/LTE standard. ¶14 col. 4:9-14
...providing at least one memory module coupled to an output of each of the first and second soft decision decoders, wherein the output of the memory module associated with the second soft decision decoder is fed back as an input of the first soft decision decoder... The accused products include at least one memory module, such as an interleaver or deinterleaver, coupled to the decoders. The output from the second decoder's associated memory is fed back to the first decoder, consistent with standard iterative turbo decoder architecture. ¶15 col. 4:9-26
...processing systematic information data and extrinsic information data using the maximum a posteriori (MAP) probability algorithm, and/or logarithm approximation algorithm... The accused products allegedly use at least the BCJR algorithm, a type of MAP algorithm, for turbo decoding as part of their 4G/LTE standards compliance. ¶16 col. 9:15-22
...weighing and storing soft decision information into the corresponding memory module... The accused products allegedly weigh (e.g., normalize) and store soft decision information (e.g., "betaQ" and "alphaQ" variables) into memory modules like interleavers as a necessary part of using a MAP or logarithm approximation algorithm. ¶18 col. 10:41-48
...performing, for a predetermined number of times, iterative decoding from the first to the last of multiple decoders, wherein an output from the last soft decision decoder is fed back as an input to the first soft decision decoder... The accused products perform iterative decoding where the output of the second ("last") decoder is fed back to the first decoder to refine decoding accuracy over a set number of iterations, as depicted in a diagram showing the iterative process. This diagram illustrates a structure with two SISO decoders where the output of Decoder 2 provides extrinsic information back to Decoder 1 (Compl. p. 30, Fig. 2). ¶19 col. 10:21-34

Identified Points of Contention

  • Scope Questions: A central question may be whether the term "circular circuit," as used in the patent, reads on the general iterative feedback loop structure of a standard 4G/LTE turbo decoder. The defense may argue the term is limited to the specific pipelined architecture disclosed in the '742 patent's specification (e.g., FIG. 4), while the complaint suggests it covers any looped decoding process.
  • Technical Questions: The complaint relies heavily on public standards and general technical diagrams to allege infringement, rather than reverse engineering of the accused products. A key question will be what evidence demonstrates that the accused products' actual implementation meets limitations such as "weighing...soft decision information" in the manner required by the claim. The complaint alleges this is a necessary function of the algorithm, a point that may be contested.

V. Key Claim Terms for Construction

"serially coupled in a circular circuit"

  • Context and Importance: This phrase describes the fundamental architecture of the claimed decoder system. The dispute may hinge on whether this requires the specific, two-stage pipelined arrangement with distinct Interleaver and De-Interleaver memories shown in the patent's primary embodiment, or if it more broadly covers any system where two decoders exchange information iteratively. The complaint's infringement theory, based on generalized diagrams of LTE turbo decoders, appears to rely on a broader interpretation.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The claim language itself does not explicitly require the exact configuration of FIG. 4, referring more generally to a "circular circuit" where an output is "fed back."
    • Evidence for a Narrower Interpretation: The detailed description repeatedly emphasizes a specific pipelined scheme where two decoders operate concurrently on data from the other's dedicated memory module ('742 Patent, Abstract; col. 2:40-48). This could be used to argue the "circular circuit" is not just any feedback loop, but this specific pipelined one.

"weighing...soft decision information"

  • Context and Importance: This limitation was added during reexamination, suggesting it was critical for patentability. Its construction will be a focal point. Practitioners may focus on this term because its meaning is not explicitly defined in the patent. The complaint alleges it is met by the "normalization" inherent in any viable MAP algorithm (Compl. ¶18). The defense may argue for a more specific meaning of "weighing" that is not universally present in all MAP implementations.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The patent specification does not appear to provide a special definition for "weighing," which may support giving it a plain and ordinary meaning that could encompass normalization or other mathematical adjustments of soft values.
    • Evidence for a Narrower Interpretation: The prosecution history of the reexamination (not provided, but which will be central to the case) may contain statements by the patentee that limit the scope of "weighing" to a specific operation to overcome prior art.

VI. Other Allegations

The complaint does not provide sufficient detail for analysis of indirect or willful infringement. It contains a single count for direct infringement and makes a general allegation of constructive notice, but does not plead specific facts to support the knowledge or intent required for inducement, contributory, or willful infringement claims (Compl. ¶21).

VII. Analyst’s Conclusion: Key Questions for the Case

  • A core issue will be one of definitional scope: can the term "circular circuit," which is tied to a specific pipelined architecture in the patent's embodiments, be construed broadly enough to cover the generalized iterative feedback loop inherent in any standard-compliant 4G/LTE turbo decoder as alleged by the complaint?
  • A second central question will be one of technical proof: beyond alleging standards-compliance, what specific evidence will show that the accused products' software or hardware actually performs the "weighing and storing" of soft decision information and utilizes the claimed "memory module" structure, as opposed to other possible implementations that are also compliant with the 4G/LTE standard?