Harbor Island Dynamic LLC v. Samsung Electronics Co Ltd

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: Harbor Island Dynamic, LLC (Texas)
  • Defendant: Samsung Electronics Co. Ltd. (Republic of Korea); Samsung Electronics America, Inc. (New York)
  • Plaintiff’s Counsel: Fabricant LLP; McKool Smith, P.C.
• Case Identification: 2:24-cv-00140, E.D. Tex., 02/27/2024
• Venue Allegations: Venue is alleged based on Samsung Electronics America maintaining corporate offices and authorized retailers within the Eastern District of Texas, and based on Samsung Electronics Co. Ltd. being a foreign corporation.
• Core Dispute: Plaintiff alleges that Defendant’s CMOS image sensors and antenna switching circuits, incorporated into smartphones and other devices, infringe four patents related to semiconductor structure and fabrication methods.
• Technical Context: The technologies at issue involve advanced semiconductor fabrication techniques designed to improve the structural integrity, electrical isolation, and manufacturing efficiency of microscopic components on silicon wafers.
• Key Procedural History: The complaint does not allege any prior litigation, inter partes review (IPR) proceedings, or licensing history related to the patents-in-suit.

Case Timeline

Date	Event
2007-03-16	'673 Patent Priority Date
2007-12-10	'886 Patent Priority Date
2010-06-29	'886 Patent Issue Date
2010-08-10	'673 Patent Issue Date
2011-10-07	'609 Patent Priority Date
2013-03-11	'826 Patent Priority Date
2015-09-29	'609 Patent Issue Date
2016-01-26	'826 Patent Issue Date
Early 2019	Samsung Electronics America centralizes offices in E.D. Tex.
2024-02-27	Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 9,245,826 - “Anchor Vias For Improved Backside Metal Adhesion To Semiconductor Substrate,” issued January 26, 2016

The Invention Explained

• Problem Addressed: The patent’s background section describes how backside metal layers on a semiconductor substrate are prone to peeling, particularly near the die's corners, due to mechanical stresses during manufacturing, which results in unacceptably low fabrication yields (ʼ826 Patent, col. 1:12-34).
• The Patented Solution: The invention proposes creating one or more "anchor vias"—metal-filled holes—in the corners or along the periphery of the substrate. The metal filler is designed to protrude from the backside of the substrate, creating a physical post to which the backside metal layer can be bonded. Crucially, these vias are purely structural and are not intended to provide an electrical ground connection to active devices on the chip (ʼ826 Patent, Abstract; col. 3:11-20).
• Technical Importance: This approach provides a robust, metal-on-metal anchor that improves the mechanical reliability and manufacturing yield of semiconductor devices, a key consideration as components become denser and more susceptible to stress (ʼ826 Patent, col. 2:49-52).

Key Claims at a Glance

• The complaint asserts at least independent claim 1 (Compl. ¶19).
• The essential elements of claim 1 are:
  • A structure comprising at least one anchor via disposed in at least one corner of a semiconductor substrate;
  • A metal filler within the anchor via having a protruding portion extending from the backside of the substrate;
  • A backside metal layer on the bottom surface of the substrate, which is bonded to the protruding portion of the metal filler;
  • Wherein the metal filler does not provide ground connection to one or more active devices in the substrate.
• The complaint generally asserts infringement of "one or more claims" of the patent (Compl. ¶18).

U.S. Patent No. 7,772,673 - “Deep Trench Isolation And Method For Forming Same,” issued August 10, 2010

The Invention Explained

• Problem Addressed: The patent addresses inefficiencies in creating deep trench isolation regions used to electrically separate components on a chip. For conventional rectangular trenches, filling the sharp corners requires depositing an overly thick layer of polysilicon, which reduces manufacturing throughput and increases costs (ʼ673 Patent, col. 1:29-38).
• The Patented Solution: The invention discloses a deep trench isolation region with at least one "chamfered corner" (i.e., a beveled or rounded corner). This modified geometry allows the trench to be filled using a thinner layer of polysilicon, thereby increasing manufacturing speed and reducing cost (ʼ673 Patent, Abstract; col. 2:38-43). The invention is defined by the structure of the corner and its functional effect on the polysilicon fill.
• Technical Importance: This method offers a more efficient and cost-effective way to fabricate isolated devices on a semiconductor die, a critical factor in high-volume manufacturing (ʼ673 Patent, col. 2:38-43).

Key Claims at a Glance

• The complaint asserts at least independent claim 1 (Compl. ¶32).
• The essential elements of claim 1 are:
  • A semiconductor die with a deep trench isolation region for isolating an electronic device, comprising:
  • A trench in the substrate with a plurality of sides surrounding the device;
  • At least one "trench chamfered corner" connecting the sides;
  • Wherein the chamfered corner "causes a reduction in a thickness of a polysilicon layer within said trench."
• The complaint asserts infringement of "one or more claims" of the patent (Compl. ¶31).

Multi-Patent Capsule: U.S. Patent No. 9,147,609 - “Through Silicon Via Structure, Method Of Formation, And Integration In Semiconductor Substrate,” issued September 29, 2015

• Technology Synopsis: The patent addresses thermal stress and contamination issues associated with Through Silicon Vias (TSVs). The proposed solution is a TSV structure featuring a hollow center, which allows the conductive filler to expand inward under thermal stress, and a "pinched off region" at the bottom of the via, which is tapered to prevent contamination during backside polishing and processing (Compl. ¶45; '609 Patent, Abstract).
• Asserted Claims: The complaint asserts at least independent claim 1 (Compl. ¶45).
• Accused Features: The accused Samsung backside illuminated sensors (e.g., S5K2G1XX BIS) are alleged to contain TSVs with a hollow tungsten filler and a tapered, pinched-off region at the bottom, which prevents contamination (Compl. ¶¶46-50).

Multi-Patent Capsule: U.S. Patent No. 7,745,886 - “Semiconductor on Insulator (SOI) Switching Circuit,” issued June 29, 2010

• Technology Synopsis: The patent describes a switching circuit on a Semiconductor-on-Insulator (SOI) wafer designed to improve performance and isolation. The invention comprises cascaded transistors where the source/drain junctions are fabricated within a device layer such that they do not contact the underlying buried oxide layer. This structure is combined with at least one isolation trench that extends down to the buried oxide layer to electrically isolate transistors, thereby reducing voltage and current fluctuations (Compl. ¶58; '886 Patent, Abstract).
• Asserted Claims: The complaint asserts at least independent claim 1 (Compl. ¶58).
• Accused Features: The accused PK5562_01 Antenna Switch die is alleged to comprise cascaded transistors fabricated in a device layer over a buried oxide (BOX) layer, where the source/drain junctions do not contact the BOX. The complaint further alleges the die uses an STI trench that extends to the BOX layer to electrically isolate transistors (Compl. ¶¶59-63).

III. The Accused Instrumentality

Product Identification

• The complaint names two primary categories of accused instrumentalities:
  1. Samsung CMOS Image Sensors (CIS), such as the S5KHM3SX CIS, which are accused of infringing the ’826 and ’673 patents (Compl. ¶¶18, 31).
  2. Samsung semiconductor components including backside illuminated sensors (e.g., S5K2G1XX BIS) and an Antenna Switch and Coupler die (e.g., PK5562_01), accused of infringing the ’609 and ’886 patents, respectively (Compl. ¶¶44, 59).

Functionality and Market Context

• These components are alleged to be incorporated into high-volume consumer electronics, including at least the Samsung Galaxy S22 Ultra Smartphone (Compl. ¶¶18, 31, 51, 57). The complaint also alleges these components are sold to third parties for inclusion in downstream products like the Google Pixel 7 Pro and Motorola Moto G Stylus 5G smartphones (Compl. ¶¶26, 38).
• The infringement allegations focus on the microscopic physical structures and fabrication methods of these semiconductor components. For the '826 and '673 patents, the complaint provides Scanning Electron Microscope (SEM) images of the S5KHM3SX CIS to show its structural features (Compl. ¶¶20, 33). For instance, an SEM image shows the location of alleged anchor vias in the corner of a die (Compl. p. 7). A separate SEM image is provided to show what is alleged to be a deep trench isolation region in the same component (Compl. p. 11).

IV. Analysis of Infringement Allegations

’826 Patent Infringement Allegations

Claim Element (from Independent Claim 1)	Alleged Infringing Functionality	Complaint Citation	Patent Citation
at least one anchor via disposed in at least one corner of a semiconductor substrate;	The accused S5KHM3SX CIS includes a structure with at least one anchor via located in a corner of the semiconductor substrate, as shown in SEM analysis. A die photo shows these vias in a corner location.	¶20; p. 7	col. 3:25-27
a metal filler within said at least one anchor via, said metal filler having a protruding portion extending from a backside of said semiconductor substrate;	The via is filled with tungsten that extends out of the via and protrudes from the backside of the substrate. An SEM cross-section image shows this "Protrusion."	¶¶21-22; p. 8	col. 3:36-40
a backside metal layer on a bottom surface of said semiconductor substrate, said backside metal layer being bonded to said protruding portion of said metal filler...;	The accused S5KHM3SX CIS has an aluminum bondpad layer that is bonded to the protruding portion of the tungsten filler.	¶23; p. 9	col. 3:40-45
wherein said metal filler within said at least one anchor via does not provide ground connection to one or more active devices in said semiconductor substrate.	The tungsten layer in the accused product allegedly does not provide a ground connection to any active device in the substrate.	¶24	col. 3:11-20

Identified Points of Contention

• Scope Questions: The infringement analysis may turn on the negative limitation "does not provide ground connection." A potential question for the court is how to construe this phrase. Does it mean the via has no electrical potential whatsoever, or that it lacks a specifically designed electrical path to ground an active device?
• Technical Questions: A key evidentiary question is what proof exists to demonstrate the absence of a ground connection. Defendant may argue that the via is connected to other structures that are part of a grounding scheme, even if not directly connected to an active device's ground terminal.

’673 Patent Infringement Allegations

Claim Element (from Independent Claim 1)	Alleged Infringing Functionality	Complaint Citation	Patent Citation
a semiconductor die comprising at least one deep trench isolation region for isolating an electronic device...	The accused S5KHM3SX CIS includes a deep trench isolation region ("DTI") that isolates an electronic device, as shown in SEM analysis.	¶33; p. 12	col. 2:40-43
...a trench situated in a substrate of said semiconductor die, said trench having a plurality of sides surrounding said electronic device...	The DTI comprises a trench situated in the substrate with multiple sides surrounding the electronic device.	¶¶34-35; p. 13	col. 3:1-10
...and at least one trench chamfered corner formed between and connecting said plurality of sides;	The DTI of the S5KHM3SX CIS is alleged to comprise at least one trench chamfered corner. An SEM image purports to show this "Chamfered corner."	¶36; p. 14	col. 3:30-33
wherein said at least one trench chamfered corner causes a reduction in a thickness of a polysilicon layer within said trench.	The complaint alleges that the trench chamfered corner of the accused product reduces the thickness of the polysilicon layer of the DTI trench.	¶37	col. 5:14-24

Identified Points of Contention

• Scope Questions: A central issue may be the functional limitation "causes a reduction in a thickness of a polysilicon layer." The dispute may focus on whether the accused structure, even if it appears chamfered, achieves this specific functional result for the reasons contemplated by the patent.
• Technical Questions: Does the accused product use a "polysilicon layer" as that term is understood in the patent? What evidence links the shape of the corner to the thickness of the fill material? Defendant may argue that any reduction in thickness is an artifact of its own, different manufacturing process, not the result of a "chamfered corner" as claimed.

V. Key Claim Terms for Construction

For the ’826 Patent

• The Term: "does not provide ground connection to one or more active devices"
• Context and Importance: This negative limitation is the primary feature distinguishing the claimed "anchor via" from a conventional grounding via. Proving this absence of function is essential for the Plaintiff's infringement case.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation (i.e., less likely to be connected): The patent repeatedly distinguishes the invention's purpose as providing "physical anchor points" from the electrical purpose of conventional TSVs, stating the anchor via "does not provide ground connection to any active devices" (ʼ826 Patent, col. 3:12-14). This suggests the term should be interpreted to exclude vias with a designed electrical grounding function for an active device.
  • Evidence for a Narrower Interpretation (i.e., more likely to be connected): The claims use the word "provide." A defendant might argue that if the via is electrically connected to any structure that is itself grounded (e.g., a large metal plane), it indirectly "provides" a ground connection, even if not to a specific active device's terminal. The specification does not provide an explicit definition of what it means to "provide" such a connection.

For the ’673 Patent

• The Term: "trench chamfered corner"
• Context and Importance: This structural term is the core of the invention. Its construction will determine what trench shapes are covered by the claim, directly impacting the infringement analysis.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The patent describes the invention as an improvement over rectangular trenches with right-angle corners (ʼ673 Patent, col. 3:9-12). Figure 2 shows a corner that is distinctly angled or beveled. This may support an interpretation that any non-90-degree corner that connects two sides of the trench falls within the claim's scope.
  • Evidence for a Narrower Interpretation: The patent describes a specific process for forming the corner, which involves utilizing a photoresist mask and an etch process (ʼ673 Patent, col. 6:35-50). A defendant could argue that a "trench chamfered corner" is not merely any rounded corner, but one that is intentionally formed by such a process to achieve the claimed functional benefit, and that a corner shape resulting as an artifact of a different process is not a "chamfered corner."

VI. Other Allegations

Indirect Infringement

• For all four patents, the complaint alleges induced infringement. The allegations state that Samsung knowingly and intentionally induces infringement by its customers (e.g., Google, Motorola) and end-users by incorporating the accused components into its own smartphones and by selling the components for inclusion in downstream products (Compl. ¶¶25-26, 38-39, 51-52, 64-65).

Willful Infringement

• The complaint does not plead specific facts to support pre-suit knowledge of the patents. However, it alleges that Defendant acted "knowingly and intentionally" and with "willfully blind" conduct to the infringement (e.g., Compl. ¶¶26, 65). The prayer for relief explicitly requests a judgment that Samsung's infringement is "willful" (Compl. p. 25, ¶b).

VII. Analyst’s Conclusion: Key Questions for the Case

• A central issue will be one of negative limitation proof: For the ’826 patent, can the Plaintiff prove the absence of a function—that the accused anchor vias do not "provide ground connection"? This will likely involve a combination of claim construction and a detailed evidentiary analysis of the accused chip's circuitry.
• A second key question will be one of functional causation: For the ’673 patent, does the accused "chamfered corner" structure actually "cause" the reduction in polysilicon thickness as claimed, or is its shape an artifact of a different manufacturing process with a different purpose? This will require the parties to litigate not just what the structure is, but why it has that structure and what functional consequences result.
• A broader theme will be one of structural identity: Across all four patents, which relate to specific semiconductor fabrication structures, the case may turn on whether the accused features in Samsung’s modern, complex components are the same as, or equivalent to, the structures defined in the patents. This will be a highly technical, expert-driven dispute fought with competing interpretations of microscopy evidence.