TurboCode LLC v. Quectel Wireless Solutions Co Ltd

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: TurboCode LLC (Texas)
  • Defendant: Quectel Wireless Solutions Co., Ltd. (China)
  • Plaintiff’s Counsel: Direction IP Law
• Case Identification: 2:25-cv-01243, E.D. Tex., 12/22/2025
• Venue Allegations: Plaintiff alleges venue is proper because the defendant is not a resident of the United States and may therefore be sued in any judicial district.
• Core Dispute: Plaintiff alleges that Defendant’s LTE cellular modules infringe a patent related to high-speed decoder architectures used for error correction in wireless communications.
• Technical Context: The technology at issue involves "turbo codes," a type of forward error correction code used to achieve reliable data transfer over noisy communication channels, which is fundamental to modern standards like 4G/LTE.
• Key Procedural History: The asserted patent was the subject of an ex parte reexamination, which resulted in the issuance of a Reexamination Certificate in 2009. The asserted claim, Claim 6, was amended during this proceeding, which may focus future validity and infringement arguments on the added language.

Case Timeline

Date	Event
1999-05-26	’742 Patent Priority Date
2004-11-02	’742 Patent Issue Date
2006-07-13	Reexamination request filed for the ’742 Patent
2009-02-10	Ex Parte Reexamination Certificate issued for ’742 Patent
2025-12-22	Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 6,813,742 - "High Speed Turbo Codes Decoder for 3G Using Pipelined SISO Log-Map Decoders Architecture"

The Invention Explained

• Problem Addressed: The patent's background section describes that prior art turbo code decoders were computationally complex, requiring many multiplications and additions. This made them slow, costly, and power-intensive, rendering them impractical for consumer wireless devices like 3G mobile phones which have limited power and processing capabilities (’742 Patent, col. 2:50-61).
• The Patented Solution: The invention proposes a decoder architecture using two pipelined "Soft-In Soft-Out" (SISO) Log-MAP decoders connected in a feedback loop via memory modules (an interleaver and a de-interleaver) (’742 Patent, Abstract; Fig. 4). This pipelined structure allows the two decoders to operate concurrently on different stages of the decoding process, enabling iterative decoding that produces a decoded output every clock cycle, thereby increasing speed and throughput while simplifying the required circuitry (’742 Patent, col. 2:38-51).
• Technical Importance: This architectural approach aimed to make powerful turbo code error correction feasible for high-speed, mass-market wireless applications by reducing hardware complexity and power consumption (’742 Patent, col. 2:31-40).

Key Claims at a Glance

• The complaint asserts independent claim 6, as amended by the Ex Parte Reexamination Certificate (Compl. ¶13).
• Claim 6 (Method) Elements:
  • Providing an input buffer with at least three shift registers for receiving an input signal and generating first, second, and third shifted input signals.
  • Providing first and second soft decision decoders serially coupled in a circular circuit, where each decoder processes soft decision data from the preceding decoder's output.
  • The first decoder receives the first and second shifted input signals; the second decoder receives the third shifted input signal.
  • Providing at least one memory module coupled to the output of each decoder, where the output of the memory module associated with the second decoder is fed back as an input to the first decoder.
  • Processing systematic and extrinsic information data using a maximum a posteriori (MAP) or similar algorithm.
  • Generating a soft decision based on that algorithm.
  • Weighing and storing the soft decision information into the corresponding memory module.
  • Performing iterative decoding for a predetermined number of times, where an output from the last decoder is fed back as an input to the first decoder and propagates through the decoders in the circular circuit.

III. The Accused Instrumentality

Product Identification

The complaint identifies the accused instrumentalities as at least the LTE EG95 Series, LTE EM05 Series, and EG91NA Series cellular wireless modules (Compl. ¶12).

Functionality and Market Context

The complaint alleges these products are LTE modules that comply with 3GPP standards (releases 8-13) for 4G/LTE communications (Compl. ¶12). A provided screenshot describes the EG95 series as an "LTE Cat 4 IoT module" designed for size-constrained, low-power applications (Compl. p. 5). The complaint alleges these modules necessarily implement turbo decoding as required by the LTE standard to receive and decode wireless signals (Compl. ¶14; p. 12). The complaint provides an FCC RF Test Report for the EG91-NA model, which identifies it as an "LTE Module" supporting LTE Band 2 (Compl. p. 6).

IV. Analysis of Infringement Allegations

Claim Chart Summary

U.S. Patent No. 6,813,742 Infringement Allegations

Claim Element (from Independent Claim 6)	Alleged Infringing Functionality	Complaint Citation	Patent Citation
...providing an input buffer comprising at least three shift registers, for receiving an input signal and generating first, second, and third shifted input signals;	The accused products provide an input buffer that receives an input signal and generates first, second, and third shifted input signals (referred to as "soft data," "soft parity 1," and "soft parity 2") for the turbo decoder. A diagram illustrates an "Input Buffer" feeding multiple "SISO Decoders" (Compl. p. 10).	¶15	col. 4:10-14, 57-65
...providing first and second soft decision decoders serially coupled in a circular circuit, wherein each decoder processes soft decision from the preceding decoder output data...	The accused products allegedly use first and second soft decision decoders (constituent decoders) connected in series, where each processes soft information from the other in a looped manner to refine accuracy through iterative feedback.	¶16	col. 4:8-13
...providing at least one memory module coupled to an output of each of the first and second soft decision decoders, wherein the output of the memory module associated with the second soft decision decoder is fed back as an input of the first soft decision decoder;	The accused products allegedly use memory modules (e.g., interleavers and deinterleavers) where the output of the second decoder is fed back as an input to the first. A diagram shows a "deinterleaver" feeding the output of "decoder 2" back to "decoder 1" (Compl. p. 16).	¶17	col. 4:10-13, 22-26
...processing systematic information data and extrinsic information data using the maximum a posteriori (AP) probability algorithm, and/or logarithm approximation algorithm;	The accused products allegedly use a MAP probability algorithm, such as the BCJR algorithm, for turbo decoding as part of their compliance with 4G LTE standards.	¶18	col. 6:53-65
...generating soft decision based on the maximum a posteriori (MAP) probability algorithm, and/or logarithm approximation algorithm;	The accused products allegedly generate soft decisions using the BCJR algorithm.	¶19	col. 10:33-40
...weighing and storing soft decision information into the corresponding memory module;	It is alleged that soft decision information is normalized or "weighted" and then stored in corresponding memory modules (interleavers/deinterleavers). The complaint asserts this is a necessary step for any viable MAP algorithm.	¶20	col. 10:40-41
...performing, for a predetermined number of times, iterative decoding from the first to the last of multiple decoders, wherein an output from the last soft decision decoder is fed back as an input to the first soft decision decoder...and propagate...in a circular circuit.	The complaint alleges that the accused products perform iterative decoding for a set number of iterations, feeding the output of one decoder stage back to the input of another in a circular feedback loop. A diagram cited in the complaint shows the output of "SISO 2" feeding back to "SISO 1" (Compl. p. 27).	¶21	col. 9:41-49; 10:40-49

Identified Points of Contention

• Scope Questions: The patent describes a specific two-decoder pipelined architecture. A central question may be whether the architecture implemented in the accused LTE modules, which is based on a public standard, meets the specific "serially coupled in a circular circuit" limitation as defined and enabled by the patent specification.
• Technical Questions: The complaint relies heavily on public technical documents, academic papers, and 3GPP standards to describe the functionality of the accused products. A key question will be what evidence demonstrates that the accused products actually practice the claimed method steps, particularly "weighing" soft decision information, beyond mere compliance with a standard that may permit multiple implementations. The complaint asserts that weighting/normalization is a necessary feature of any viable MAP algorithm (Compl. ¶20), a point that may be subject to technical dispute.

V. Key Claim Terms for Construction

• The Term: "serially coupled in a circular circuit"

  • Context and Importance: This term is central to the claimed architecture. The patent’s novelty appears to derive from its specific arrangement of two pipelined decoders. Whether the standard LTE turbo decoder architecture, which involves iterative processing between two conceptual decoder blocks, constitutes a "circular circuit" as described in the patent will be a critical issue for infringement.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The claim language does not require a specific physical layout, suggesting any arrangement where decoders process data sequentially and provide feedback in a loop could be covered. The specification describes the system as two decoders "connected in a feedback loop" (’742 Patent, col. 4:10-11).
    • Evidence for a Narrower Interpretation: The patent repeatedly emphasizes a "pipelined scheme" where "the first decoder is decoding data in the de-interleaver-Memory, the second decoder performs decoding data in the interleaver-Memory" (’742 Patent, col. 2:45-49). This suggests a specific operational relationship and timing dependency that might narrow the term's scope to architectures that function identically to the described embodiment.

• The Term: "weighing...soft decision information"

  • Context and Importance: This is an active step in the claimed method. The complaint alleges this maps to normalization of soft decision values (Compl. ¶20). The infringement analysis may turn on whether the accused devices perform an operation that can be characterized as "weighing" and whether this term implies a specific mathematical operation beyond what is inherent in any MAP/BCJR algorithm.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The term is not explicitly defined in the patent, which may support giving it a plain and ordinary meaning that could encompass various forms of scaling or normalization common in signal processing. The patent focuses on the overall architecture rather than the specifics of the algorithm's implementation.
    • Evidence for a Narrower Interpretation: The patent does not appear to use the term "weighing" in the specification outside of the reexamined claim text. The original claims do not contain this term. A defendant may argue that the term lacks antecedent basis in the original disclosure, or that its meaning must be limited to a specific operation described in the prosecution history of the reexamination.

VI. Other Allegations

• Indirect Infringement: The complaint does not contain counts for indirect infringement (induced or contributory).
• Willful Infringement: The complaint does not include a claim for willful infringement. It alleges Defendant had at least constructive notice of the patent (Compl. ¶23), which is a prerequisite for damages but does not, on its own, establish the knowledge required for a willfulness claim.

VII. Analyst’s Conclusion: Key Questions for the Case

This dispute appears to center on whether a standardized, widely adopted technology (LTE turbo decoding) infringes a patent describing a specific decoder architecture. The key questions for the court will likely be:

1. A core issue will be one of architectural equivalence: Does the iterative processing scheme defined in the 3GPP LTE standard, and allegedly implemented by Defendant, constitute the specific "serially coupled...circular circuit" with pipelined operation as claimed and described in the ’742 patent, or is there a material difference in structure and operation?
2. A second central question will be one of claim scope and technical proof: Can the method step of "weighing...soft decision information," which was added during reexamination, be read broadly to cover inherent normalization within standard MAP algorithms, and what technical evidence will show that the accused products perform this specific, affirmative step as required by the claim?