TurboCode LLC v. Itron Inc

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: TurboCode LLC (Texas)
  • Defendant: Itron, Inc. (Washington)
  • Plaintiff’s Counsel: Direction IP Law
• Case Identification: 7:25-cv-00493, W.D. Tex., 10/27/2025
• Venue Allegations: Plaintiff alleges venue is proper in the Western District of Texas because Defendant maintains a regular and established place of business in Austin, Texas.
• Core Dispute: Plaintiff alleges that Defendant’s cellular communication products, which comply with 4G/LTE and LTE-M standards, infringe a patent related to a high-speed, power-efficient architecture for turbo code decoders.
• Technical Context: The technology at issue involves turbo codes, a class of forward error-correction codes used to achieve reliable data transmission in noisy communication channels, which are fundamental to modern wireless standards like 4G/LTE.
• Key Procedural History: The patent-in-suit was the subject of an ex parte reexamination requested in 2006, and a Reexamination Certificate was issued in 2009. The asserted claim is a reexamined claim, suggesting its patentability was reconsidered and confirmed by the USPTO after its original issuance.

Case Timeline

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 6,813,742 - High Speed Turbo Codes Decoder for 3G Using Pipelined SISO Log-Map Decoders Architecture

• Patent Identification: U.S. Patent No. 6,813,742, "High Speed Turbo Codes Decoder for 3G Using Pipelined SISO Log-Map Decoders Architecture," issued November 2, 2004.

The Invention Explained

• Problem Addressed: The patent addresses the challenge of implementing computationally complex Maximum a Posteriori (MAP) decoding algorithms for Turbo Codes in power- and cost-sensitive devices like 3G mobile phones. The background notes that prior art decoders required significant hardware, power, and cost, making them impractical for consumer devices ('742 Patent, col. 2:19-29).
• The Patented Solution: The invention proposes a decoder architecture using two serially connected, pipelined Soft-In/Soft-Out (SISO) Log-MAP decoders. This architecture creates a feedback loop where the decoders iteratively refine the received data ('742 Patent, Fig. 4). By operating in the logarithmic ("Log") domain, complex multiplication operations are replaced with simpler, faster, and more power-efficient adder circuits, making the decoder simpler to implement in an Application-Specific Integrated Circuit (ASIC) ('742 Patent, col. 2:52-58). The pipelined structure allows a decoded output to be produced on each clock cycle, increasing data throughput ('742 Patent, col. 2:58-61).
• Technical Importance: This approach aimed to make high-performance error correction feasible for the mass-market 3G wireless devices of the era by reducing hardware complexity, lowering power consumption, and increasing decoding speed ('742 Patent, col. 2:35-40).

Key Claims at a Glance

• The complaint asserts independent method claim 6, as amended by the Ex Parte Reexamination Certificate (Compl. ¶13).
• The essential elements of reexamined claim 6 are:
  • Providing an input buffer with at least three shift registers to receive a signal and generate first, second, and third shifted signals.
  • Providing first and second soft decision decoders serially coupled in a circular circuit, with each processing output from the preceding decoder, and with the decoders also receiving the shifted signals from the input buffer.
  • Providing at least one memory module for each decoder, where the output from the second decoder's memory is fed back to the first decoder's input.
  • Processing systematic and extrinsic information data using a MAP or logarithm approximation algorithm.
  • Generating a soft decision based on a MAP or logarithm approximation algorithm.
  • Weighing and storing the soft decision information into the memory module.
  • Performing iterative decoding for a predetermined number of times, where the last decoder's output is fed back to the first in a circular circuit.

III. The Accused Instrumentality

Product Identification

• The Accused Instrumentalities include the OpenWay Centron Cellular LTE-M Meter, the Itron Cellular 500W Module, and the OpenWay Riva Socket Based Router, as well as other similar products using LTE chips (Compl. ¶12, ¶22).

Functionality and Market Context

• The accused products are smart meters and communication modules designed to transmit data over public cellular networks using 4G/LTE and LTE-M (a low-power variant of LTE for IoT devices) standards (Compl. ¶12; Compl. p. 5). The complaint alleges that to operate on these networks, the products must implement the turbo decoding functionality specified by the 3rd Generation Partnership Project (3GPP) standards (Compl. ¶14). The infringement theory is grounded in the allegation that compliance with the 3GPP LTE standard necessitates the use of a turbo decoder architecture that practices the claimed method (Compl. ¶14). The complaint includes a product image of the OpenWay CENTRON meter, describing it as a "smart meter for the smart grid" that uses an LTE Itron Cellular Module (Compl. p. 5).

IV. Analysis of Infringement Allegations

The complaint provides numerous technical documents and diagrams to support its infringement allegations. A diagram from an FCC report for an Itron device shows a "4G/LTE Module" connected to a "Decoding + RM [Rate Matching]" block, which Plaintiff alleges performs the claimed decoding method (Compl. p. 8). Another diagram illustrates the standard turbo decoder architecture in an LTE receiver, showing data being fed into a "Turbo Decoder" block (Compl. p. 9).

'742 Patent Infringement Allegations

• Identified Points of Contention:
  • Evidentiary Questions: The complaint asserts that the presence of "at least three shift registers" is "implicit from the evidence" and can be "reasonably inferred" from the functionality of the LTE standard (Compl. ¶16). This suggests the structure is not explicitly documented in the cited standards. A central factual dispute may arise over whether the accused products physically or logically contain this specific structure, or if they achieve a similar function through different means.
  • Scope Questions: The complaint maps the claim limitation "weighing... soft decision information" to the functions of "rate matching and rule matching" within the LTE standard (Compl. ¶49, ¶51). A key legal question will be whether these standardized processes, which involve selection and puncturing of bits, fall within the scope of the term "weighing" as used in the patent.

V. Key Claim Terms for Construction

• The Term: "weighing ... soft decision information"

• Context and Importance: This is a crucial active step in the claimed method. The complaint equates this step with the "rate matching and memory management" functions specified in the LTE standard (Compl. ¶49). The viability of the infringement case may depend on whether the court construes "weighing" to encompass these standard functions. Practitioners may focus on this term because its definition is not explicitly provided in the patent, opening it to interpretation.

• Intrinsic Evidence for Interpretation:

  • Evidence for a Broader Interpretation: The patent does not define "weighing," which could support an argument that the term should be given its plain and ordinary meaning, potentially covering any process that modifies, scales, or selectively prioritizes soft decision values before storage.
  • Evidence for a Narrower Interpretation: The patent specification does not appear to use the term "weighing" outside of the claims themselves. A defendant may argue that in the context of signal processing, "weighing" implies a specific mathematical multiplication by a weighting factor, a step that may be absent from the accused "rate matching" and "bit selection" functions.

• The Term: "circular circuit"

• Context and Importance: This term defines the core iterative architecture of the claimed decoder. The infringement allegation relies on the feedback loop inherent in standard turbo decoders, where two constituent decoders exchange "extrinsic information" (Compl. ¶16).

• Intrinsic Evidence for Interpretation:

  • Evidence for a Broader Interpretation: Figure 4 of the patent depicts a clear feedback architecture where the output path from Decoder B connects back to the input of Decoder A via the De-Interleaver Memory 45 ('742 Patent, Fig. 4). This visual could support a broad construction covering any architecture where decoders are arranged in an iterative feedback loop.
  • Evidence for a Narrower Interpretation: A defendant might argue the term requires the specific "serially coupled" arrangement shown in Figure 4, where the output of one directly or indirectly forms the input of the other in a repeating sequence. If an accused device's architecture involves parallel processing or a different data flow between iterations, it could be argued to fall outside this scope.

VI. Analyst’s Conclusion: Key Questions for the Case

This dispute appears to center on whether an architecture compliant with a public telecommunications standard necessarily infringes the specific method claimed in the ’742 patent. The resolution will likely depend on the answers to two central questions:

1. A core issue will be one of structural equivalence: Does the accused devices' implementation of the 3GPP LTE standard, particularly its turbo decoder, contain the specific structures recited in claim 6, such as an "input buffer comprising at least three shift registers"? Or does the complaint improperly infer structure from function, creating a mismatch between the patent's requirements and the accused technology?

2. A key legal question will be one of definitional scope: Can the claim term "weighing... soft decision information" be construed to cover the standardized functions of "rate matching" and "bit selection" as performed in LTE decoders? Or does "weighing" require a distinct technical step that is not performed by the accused products, thereby creating a non-infringement defense?