Digital Empire Ltd v. Hilltop Technology LLC

1. Case Identification

• Case #: IPR2014-00584
• Patent #: 7,864,503
• Filed: April 5, 2014
• Petitioner(s): Digital Empire Limited
• Patent Owner(s): Hilltop Technology LLC
• Challenged Claims: 1-12

2. Patent Overview

• Title: Capacitive Type Touch Panel
• Brief Description: The ’503 patent discloses a capacitive touch panel constructed on a transparent substrate. The design features an array of first conductors and an array of second conductors formed on the substrate’s top surface, arranged alternately to form a matrix. Conductive bridging lines interconnect adjacent conductors in each array, with insulators placed at the intersections to prevent electrical contact, thereby creating a matrix of capacitive regions for touch detection. The patent also discloses that the conductors can be formed with a plurality of holes to adjust sensitivity and improve transparency.

3. Grounds for Unpatentability

Ground 1: Anticipation of Claims 1-3 under 35 U.S.C. §102

• Prior Art Relied Upon: Fujitsu (Japanese Published Patent Application No. 60-75927).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Fujitsu, which describes a coordinate input device, discloses every limitation of claims 1, 2, and 3. Fujitsu teaches a transparent substrate with X-electrodes (101) and Y-electrodes (102) that correspond to the claimed first and second conductor arrays. Portions of these electrode lines serve as the claimed first and second bridging lines, and a transparent insulating film (103) is disposed at the intersections, functioning as the claimed insulators. Petitioner asserted that these elements are arranged in the same manner claimed in the ’503 patent to form a capacitive touch panel made of transparent conductive materials.

Ground 2: Anticipation of Claims 1-4 under 35 U.S.C. §102

• Prior Art Relied Upon: Bolender (Application # 2005/0030048).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner contended that Bolender’s disclosure of a capacitive sensing device anticipates claims 1-4. Bolender describes a sensor pattern on a substantially transparent substrate. The claimed arrays of first and second conductors are met by Bolender’s diamond-shaped sensor components (e.g., 306, 308, 310 and 318, 320, 322). The first and second bridging lines are disclosed as conductive bridges (352, 354) and sensor traces that electrically couple the diamond-shaped components. An insulator (350) is explicitly taught to be disposed where the bridges and traces cross, meeting the insulator limitation of claim 1. Bolender further teaches using transparent conductive material like ITO, anticipating claim 4.

Ground 3: Claims 1, 2, 3, and 11 are obvious over Fujitsu and Binstead

• Prior Art Relied Upon: Fujitsu (Japanese Published Patent Application No. 60-75927) and Binstead (Patent 6,137,427).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner asserted that Binstead discloses a touchpad with nearly all structural elements of claim 1, including a first and second series of spaced-apart conductors (12, 14), narrower conductor parts that act as bridging lines, and insulating material (13') deposited at the intersections. However, Binstead’s substrate is described as an electrically insulating membrane, not necessarily transparent. Fujitsu was introduced for its teaching of forming a similar electrode pattern on a transparent substrate for a display device.
  • Motivation to Combine: A POSITA would combine Binstead’s touchpad structure with Fujitsu’s transparent substrate to create a touch panel for use with a display. The motivation is straightforward: to view content through the touch panel, the underlying substrate must be transparent. The combination was presented as a predictable solution to a known design need.
  • Expectation of Success: The combination involved applying a known touchpad structure to a standard transparent substrate, a simple substitution that a POSITA would expect to work successfully.

Ground 7: Claims 5, 6, 7, and 8 are obvious over Fujitsu and Bolender

• Prior Art Relied Upon: Fujitsu (Japanese Published Patent Application No. 60-75927) and Bolender (Application # 2005/0030048).

• Core Argument for this Ground:

  • Prior Art Mapping: This ground addresses dependent claims 5-8, which add limitations requiring the conductors to be formed with a “plurality of holes” or “through-holes.” Petitioner relied on Fujitsu to teach the base capacitive touch panel structure, as established in Ground 1. Bolender was added for its disclosure of a capacitive sensor with a lattice design that includes openings (e.g., 702) in the conductive material. These openings in Bolender directly correspond to the “holes” recited in the challenged claims.
  • Motivation to Combine: A POSITA would incorporate the openings taught by Bolender into the conductor design of Fujitsu for two primary reasons. First, the openings increase the amount of light that can pass through the panel, improving illumination from an underlying display. Second, creating holes reduces the amount of conductive material needed, lowering production costs.
  • Expectation of Success: Petitioner argued there was a strong expectation of success, as creating openings in conductive films was a known technique for balancing conductivity with transparency and cost.

• Additional Grounds: Petitioner asserted numerous additional obviousness challenges against claims 4-12 based on various combinations of Fujitsu or Bolender with other references (e.g., Lai, Takeda, Aoki, Fong, Jain, Seguine, Ohtake, Chen, Nakanishi-1, and Nakanishi-2) to teach specific materials for conductors and insulators, or specific wiring configurations.

4. Key Claim Construction Positions

• "transparent substrate" (claims 1-12): Petitioner proposed this term includes a substrate with a light transmittance of less than 100 percent, arguing the patent specification describes materials with a wide range of refractive indexes and does not specify thickness, leading to varying levels of transparency.
• "plurality of holes" (claim 5): Petitioner argued this term means that holes are made directly in the conductive material itself, such that no conductive material exists where the holes are located.
• "through hole" (claim 6): This term was construed similarly to "plurality of holes," meaning a hole made in the conductive material where no conductive material remains, and not a hole through the underlying transparent substrate.

5. Relief Requested

• Petitioner requests institution of an inter partes review and cancellation of claims 1-12 of Patent 7,864,503 as unpatentable.