PTAB

IPR2016-00094

Micron Technology Inc v. Limestone Memory Systems LLC

Log In
Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Semiconductor Memory Device With Redundancy Circuit
  • Brief Description: The ’441 patent describes a semiconductor memory device that uses a divided bit line architecture to improve the efficiency of replacing defective memory components. The invention uses a portion of the row address, in addition to the column address, to determine whether to activate a redundant column selection line, enabling a single redundant line to replace defective portions from different columns.

3. Grounds for Unpatentability

Ground 1: Anticipation of Claims 1-3 and 5 by McAdams

  • Prior Art Relied Upon: McAdams (Patent 5,270,975).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that McAdams discloses every limitation of independent claim 1 and dependent claims 2, 3, and 5. McAdams teaches a memory device with a divided bit line architecture, including a plurality of column selection lines and at least one redundant column selection line. Petitioner asserted that McAdams’s fusible comparator decoders constitute a "first circuit" that generates a detection signal when a defective column address is supplied. Furthermore, McAdams’s enable logic and redundant column decoder form a "second circuit" that activates the redundant line in response to both the detection signal and, critically, a part of the row address (specifically, the most significant bits, anticipating claim 5).
    • Prior Art Mapping (Dependent Claims): Petitioner mapped the fuse block limitation of claim 2 to the fuses disclosed in McAdams's input circuits. For claim 3, Petitioner argued that under its proposed construction of "transfer gate," the logic within McAdams’s input circuits, which is controlled by the row address to transfer the detection signal, meets the claim limitation.

Ground 2: Obviousness of Claims 3 and 6-15 over McAdams in view of Minami

  • Prior Art Relied Upon: McAdams (Patent 5,270,975) and Minami (Japanese Patent Application No. H06-052696).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that McAdams discloses the majority of the limitations of claims 3 and 6-15, which relate to a more detailed memory architecture and redundancy scheme. The key limitations allegedly not explicitly taught by McAdams are the inhibition of a regular column decoder when a redundant line is activated (claims 8, 10) and, under a narrow construction, the use of a transistor as a "transfer gate" (claims 3, 13). Petitioner contended that Minami supplies these missing elements. Minami explicitly teaches inhibiting normal column decoders to reduce power consumption when a spare bit line is activated. Minami also discloses using NMOS transistors as transfer gates to pass a signal indicating a defective cell, controlled by the word line (row address).
    • Motivation to Combine: Petitioner asserted a person of ordinary skill in the art (POSITA) would combine McAdams and Minami for several reasons. First, both references address the identical problem of improving redundancy efficiency and reducing chip area in semiconductor memory. Second, a POSITA would have recognized the components as interoperable and found it obvious to apply Minami’s well-known decoder arrangement, including its power-saving inhibition feature, to improve the system of McAdams. Third, the combination represents a simple substitution of known elements (e.g., modifying McAdams’s logic with Minami’s specific transistor-based transfer gates) to achieve predictable results.
    • Expectation of Success: Petitioner argued that combining the teachings would have yielded predictable and desirable results, namely an improved redundancy system with lower power consumption, and thus a POSITA would have had a high expectation of success.

4. Key Claim Construction Positions

  • "transfer gate" (claims 3 and 13): This term was central to Petitioner's arguments.
    • Petitioner proposed a broad plain and ordinary meaning: "logic that transfers the logic value of a signal."
    • This construction was critical because Petitioner argued that under this broad definition, the logic circuits in McAdams alone anticipate the limitation. In the alternative, if the term were construed more narrowly to require a specific transistor structure (e.g., "a transistor which transfers a signal from its source to its drain"), Petitioner argued that Minami explicitly teaches such a structure, rendering the claims obvious over the combination of McAdams and Minami.

5. Relief Requested

  • Petitioner requests institution of an inter partes review and cancellation of claims 1-3 and 5-15 of the ’441 patent as unpatentable.