PTAB

IPR2016-00983

Dell Inc. v. Chrimar Systems, Inc.

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1. Case Identification

2. Patent Overview

  • Title: Ethernet Data Terminal Equipment Identification
  • Brief Description: The ’012 patent describes a system for identifying Ethernet data terminal equipment by associating distinguishing information with a specific impedance value present in a path coupled across selected contacts of an Ethernet connector.

3. Grounds for Unpatentability

Ground 1: Claims 31, 35, 36, 40, 43, 52, 56, 59, 60, and 65 are obvious over the De Nicolo references.

  • Prior Art Relied Upon: De Nicolo ’468 (Patent 6,115,468) and De Nicolo ’666 (Patent 6,134,666).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner asserted that De Nicolo ’468 discloses the foundational elements of independent claim 31, including an Ethernet power distribution system with terminal equipment, connectors, and paths across contacts. De Nicolo ’666 was argued to supply the missing limitation of associating "distinguishing information" with impedance, as it teaches using a resistor (Rset) with a specific value to encode a module’s power demand, which a power supervisor then detects. Dependent claims were mapped to disclosures of resistors (Rset in ’666), controllers (power supervisor in ’666), BaseT systems (implied by the 4-wire system in ’468), and impedance being a function of voltage (the detection mechanism in ’666).
    • Motivation to Combine: A person of ordinary skill in the art (POSITA) would combine the teachings because both references address powering remote devices, share the same inventor, and solve a related problem. It would have been an obvious and simple substitution to incorporate the impedance-based identification technique from ’666 into the power-over-Ethernet system of ’468 to determine the power requirements of a connected device before supplying full power.
    • Expectation of Success: A POSITA would have a reasonable expectation of success because it involved applying a known technique from ’666 (using a resistor to signal information) to a compatible system from ’468 (an Ethernet power system) for its intended purpose.

Ground 2: Claims 31, 35, 36, 40, 43, 56, 59, 60, and 65 are obvious over de Nijs in view of Chaudhry.

  • Prior Art Relied Upon: de Nijs (Patent 5,568,525) and Chaudhry (Patent 5,790,363).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that de Nijs alone teaches every limitation of independent claim 31. de Nijs describes a network port configurator that automatically detects a workstation’s network protocol (e.g., Ethernet vs. Token Ring) by measuring its characteristic impedance, thereby associating "distinguishing information" (the protocol type) with impedance. Chaudhry, which discloses an overvoltage/overcurrent protection system for 10BASE-T Ethernet, was asserted to further support the obviousness of dependent claims, such as claim 40’s requirement for a resistor in the path.
    • Motivation to Combine: A POSITA would combine Chaudhry’s overvoltage/overcurrent protection system with the Ethernet workstation described in de Nijs. This combination was presented as an obvious design choice to improve the robustness and safety of the de Nijs system by applying a known protection circuit to its known application (Ethernet).
    • Expectation of Success: The combination was asserted to be predictable, as it involved adding a standard protection circuit to a standard Ethernet workstation without changing the fundamental operation of either.

Ground 3: Claims 31, 35, 36, 40, 43, 56, 59, 60, and 65 are obvious over the IEEE 802.3 Standard references.

  • Prior Art Relied Upon: IEEE 802.3-1993, IEEE 802.3l-1992, and IEEE 802.3r-1996 (collectively, the "IEEE 802.3 Standard").
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued the IEEE 802.3 Standard itself renders the claims obvious. The standard mandates that compliant Ethernet equipment (both 10BASE5 and 10BASE-T) must present a specific, standardized differential input impedance (e.g., 78 Ω for 10BASE5, 100 Ω for 10BASE-T). This required impedance allows for the identification of standards-compliant devices and distinguishes between different Ethernet types, directly teaching the association of "distinguishing information" with impedance. The standard also explicitly describes all other claimed elements, including connectors, paths, resistors (used for termination), and controllers (Media Access Controller).
    • Motivation to Combine: Petitioner asserted these are not three separate references but a single, cohesive standard that a POSITA would read and apply together. The supplemental standards (’3l and ’3r) were published to be incorporated into the main 802.3 standard and define conformance testing for 10BASE-T and 10BASE5 systems, respectively.
    • Expectation of Success: A POSITA would be implementing the teachings of a single, unified standard, making the outcome entirely predictable and successful.

4. Key Claim Construction Positions

  • "wherein distinguishing information...is associated to impedance...": Petitioner argued this central claim clause is not a structural limitation but rather a non-limiting statement of intended use for an old product. The argument was that because Ethernet equipment with impedance paths was well known, merely describing that this known property can be used to distinguish devices does not make the old structure patentable.
  • "BaseT": Petitioner proposed construing this term as "10BASE-T." The argument was based on the consistent use of the term within the ’012 patent and its incorporated references exclusively in the context of the "10BASE-T" standard.

5. Key Technical Contentions (Beyond Claim Construction)

  • Priority Date Challenge: A central contention was that the ’012 patent is not entitled to the April 10, 1998 priority date of its provisional application (’279 provisional). Petitioner argued the ’279 provisional fails to provide written description support for key limitations, particularly the "wherein distinguishing information...is associated to impedance" clause. This alleged failure would push the patent’s critical date to its April 8, 1999 PCT filing date, firmly establishing the prior art status of all asserted references.

6. Relief Requested

  • Petitioner requested the institution of an inter partes review and cancellation of claims 31, 35, 36, 40, 43, 52, 56, 59, 60, and 65 of the ’012 patent as unpatentable.