PTAB
IPR2016-01143
Hamamatsu Corp v. President & Fellows Of Harvard College
1. Case Identification
- Case #: IPR2016-01143
- Patent #: 7,884,446
- Filed: June 3, 2016
- Petitioner(s): Hamamatsu Corporation
- Patent Owner(s): President & Fellows of Harvard College
- Challenged Claims: 1-11
2. Patent Overview
- Title: Semiconductor Substrate with Submicron-Sized Surface Features
- Brief Description: The ’446 patent discloses a semiconductor substrate having a surface with a plurality of submicron-sized, columnar "spikes." The specification describes forming these features by irradiating a semiconductor substrate with ultra-short laser pulses while the surface is in contact with a fluid.
3. Grounds for Unpatentability
Ground 1: Claims 1, 2, and 4-11 are anticipated under 35 U.S.C. §102 by Uematsu
- Prior Art Relied Upon: Uematsu (Japanese Pat. Pub. No. H6-244444).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that Uematsu disclosed every limitation of the challenged claims. Uematsu teaches a light-confining structure on a silicon substrate with a "transition layer" of pyramid-shaped projections to reduce surface reflectance. Its working example disclosed pyramids with an average "size" of 0.3 µm (300 nm), which Petitioner contended meets the claimed average width range of 100-500 nm. Although Uematsu does not explicitly state the pyramid height, Petitioner argued the height was inherently disclosed. Uematsu's alkaline etching process on a (100) oriented silicon surface was known to predictably produce pyramid structures with a height of approximately 150-210 nm, which satisfies the claim requirement of "less than about 1 micrometer." For claims 7-10, which recite formation by laser pulses, Petitioner asserted they are improper product-by-process claims whose process limitations should be disregarded, as the resulting structure is identical to that taught by Uematsu.
Ground 2: Claim 3 is obvious under 35 U.S.C. §103 over Uematsu
- Prior Art Relied Upon: Uematsu (Japanese Pat. Pub. No. H6-244444).
- Core Argument for this Ground:
- Prior Art Mapping: Claim 3 adds the limitation that the substrate comprises an "n-doped silicon wafer." Uematsu discloses applying its surface texturing to a p-type silicon wafer.
- Motivation to Combine: Petitioner contended that doping and surface topography address different engineering problems (electrical characteristics vs. light absorption, respectively). A person of ordinary skill in the art (POSITA) would have recognized that the benefits of Uematsu's surface texturing were independent of the doping type. Since many photodetecting devices use n-doped substrates, a POSITA would have been motivated to apply Uematsu’s established texturing method to a conventional n-doped wafer to improve its light-receiving properties.
- Expectation of Success: Because Uematsu demonstrated success with a p-type wafer, a POSITA would have had a high expectation of success in applying the same method to an n-doped wafer, as the surface etching chemistry would be substantially the same.
Ground 3: Claims 1, 4-8, and 11 are anticipated by Singh; Claims 9 and 10 are obvious over Singh
- Prior Art Relied Upon: Singh (Patent 5,635,089).
- Core Argument for this Ground:
- Prior Art Mapping (Anticipation): Petitioner argued that Singh anticipates claims 1, 4-8, and 11. Singh teaches a method for increasing the surface area of materials, including semiconductors, by creating micro-rough structures using pulsed laser irradiation. The resulting structures are described as cones, columns, and peaks. Critically, Singh discloses feature heights as small as ¼ micron (250 nm) and thicknesses (widths) as small as ¼ micron (250 nm). Petitioner asserted that because these specific values fall within the ranges recited in the claims (e.g., height <1 µm; width 100-500 nm), Singh anticipates these limitations. Singh also discloses using a laser with pulse durations from 1 picosecond to 1 millisecond, which overlaps with the broader range of "a few nanoseconds" recited in claim 8.
- Motivation to Combine (Obviousness): For claims 9 and 10, Petitioner argued obviousness. Claim 9 recites a laser pulse width of 50-500 femtoseconds, and claim 10 recites a pulse energy of 10-400 microjoules. While Singh’s disclosed ranges do not directly overlap with these specific narrow ranges, Singh teaches that pulse duration and energy density are key variables for controlling surface morphology. Petitioner argued that it would have been obvious for a POSITA to optimize these known parameters through routine experimentation to achieve a desired surface structure. The claimed ranges represent a difference in degree, not kind, from the results achievable with Singh's method.
- Expectation of Success: A POSITA would have reasonably expected to successfully create the desired submicron structures by tuning the laser parameters taught by Singh, as this was a conventional optimization process.
4. Key Claim Construction Positions
- Product-by-Process Claims (Claims 7-10): Petitioner asserted that claims 7-10, which depend from apparatus claim 1 and add limitations describing how the submicron features are "generated by irradiating" them with a laser, are product-by-process claims. Petitioner argued that under established case law, the patentability of such claims rests on the novelty of the product itself, not the process of making it. Therefore, the process limitations should be given no patentable weight. This construction was critical to the anticipation argument over Uematsu, which discloses an identical structure made by a different process (chemical etching).
5. Relief Requested
- Petitioner requested institution of an inter partes review and cancellation of claims 1-11 of the ’446 patent as unpatentable.