PTAB
IPR2017-00101
Samsung Electronics Co Ltd v. Ibex PT Holding Co Ltd
Key Events
Petition
Table of Contents
petition
1. Case Identification
- Case #: IPR2017-00101
- Patent #: 8,654,855
- Filed: October 17, 2016
- Petitioner(s): Samsung Electronics Co., Ltd.
- Patent Owner(s): IBEX PT Holdings Co., Ltd.
- Challenged Claims: 1-5
2. Patent Overview
- Title: Apparatus and Method for Decoding Motion Information
- Brief Description: The ’855 patent relates to video coding technologies, specifically an apparatus and method for decoding motion information in "merge mode." The technology aims to reduce the amount of motion information that must be transmitted by allowing a current block of video data to inherit motion vectors and reference picture indices from neighboring spatial or temporal blocks.
3. Grounds for Unpatentability
Ground 1: Obviousness over WD5 and Lin - Claims 1-5 are obvious over WD5 in view of Lin.
- Prior Art Relied Upon: WD5 (JCTVC-G1103, Working Draft 5 of High-Efficiency Video Coding) and Lin (Application # 2012/0236942).
- Core Argument for this Ground:
- Prior Art Mapping: Petitioner argued that WD5, a publicly available working draft of the High-Efficiency Video Coding (HEVC) standard, disclosed every limitation of the challenged claims. WD5 taught an apparatus and process for decoding motion information in merge mode, including using available spatial and temporal merge candidates to derive motion information for a current prediction unit when a
merge_flagis active. Specifically for claim 1, Petitioner mapped WD5’s disclosure of generating prediction blocks from decoded motion vectors and decoding residual blocks through inverse scanning, inverse quantization, and inverse transformation. Critically, Petitioner contended that WD5 explicitly taught the limitation of selecting a motion vector for a temporal merge candidate from one of two candidate blocks (a right-bottom or center block) based on the current block's position relative to the boundary of the largest coding unit (LCU). Petitioner asserted that WD5 also disclosed the dependent claim limitations related to using a single quantization parameter for certain coding units (claims 2-3), predetermining a reference size per picture or slice (claim 4), and using different reference picture indices for the temporal merge candidate versus the candidate picture (claim 5). - Motivation to Combine (for §103 grounds): Petitioner asserted that WD5 provided nearly all the teachings. Lin, which also related to the development of the HEVC standard, was cited to demonstrate the obviousness of implementing the decoding processes of WD5 in an apparatus containing a processor. A Person of Ordinary Skill in the Art (POSITA) would combine the algorithmic disclosures of the WD5 standard draft with the common knowledge of using processors for video decoding, as detailed in Lin, to create a functional decoding device. The motivation was the predictable implementation of a new video coding standard on known hardware platforms.
- Expectation of Success (for §103 grounds): A POSITA would have had a high expectation of success because implementing video compression algorithms described in a standard-track document like WD5 on a general-purpose processor or dedicated hardware, as suggested by Lin, was a well-established and predictable engineering task with a finite number of known solutions.
- Prior Art Mapping: Petitioner argued that WD5, a publicly available working draft of the High-Efficiency Video Coding (HEVC) standard, disclosed every limitation of the challenged claims. WD5 taught an apparatus and process for decoding motion information in merge mode, including using available spatial and temporal merge candidates to derive motion information for a current prediction unit when a
4. Key Claim Construction Positions
- Petitioner contended that the claim terms reciting a "unit" configured to perform a function (e.g., "merge mode motion information decoding unit," "prediction block generation unit") are means-plus-function terms under 35 U.S.C. §112, para. 6.
- Petitioner argued that the ’855 patent specification failed to disclose the necessary corresponding structure, specifically a definite algorithm, required to perform the claimed functions.
- For the purposes of the IPR proceeding, Petitioner proposed that the corresponding structure should be interpreted as a general-purpose processor programmed to execute software that performs the recited functions, and then argued that the combination of WD5 and Lin disclosed such a structure.
5. Key Technical Contentions (Beyond Claim Construction)
- Petitioner's primary technical contention was that the challenged claims of the ’855 patent were not entitled to their asserted priority date of August 29, 2011.
- Petitioner argued that the Korean priority application failed to provide adequate written support for a key limitation of claim 1, namely, the specific condition for selecting the motion vector of the second merge candidate block "if the current block is adjacent to a lower boundary of the largest coding unit."
- This lack of support, Petitioner asserted, meant the claims' earliest effective filing date was the PCT application filing date of January 20, 2012. This later critical date was crucial because it rendered WD5, which was published on December 30, 2011, a valid prior art reference under pre-AIA §102(a).
6. Relief Requested
- Petitioner requested the institution of an inter partes review and the cancellation of claims 1-5 of the ’855 patent as unpatentable.
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