Samsung Electronics Co., Ltd. v. Flamm, Daniel

1. Case Identification

• Patent #: RE40,264 E
• Filed: July 10, 2017
• Petitioner(s): Samsung Electronics Company, Ltd.
• Patent Owner(s): Daniel L. Flamm
• Challenged Claims: 56-63 and 70-71

2. Patent Overview

• Title: Multi-Temperature Processing
• Brief Description: The ’264 patent discloses a method for processing semiconductor wafers within a single chamber at two or more different, pre-selected temperatures. The system uses a substrate holder (chuck) with a control circuit to sense temperature and transition between the different temperature steps within a pre-selected time period to perform processes like etching.

3. Grounds for Unpatentability

Ground 1: Obviousness of Claims 56 and 58 over Kadomura and Matsumura

• Prior Art Relied Upon: Kadomura (Patent 6,063,710) and Matsumura (Patent 5,151,871).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Kadomura taught the core elements of independent claim 56, including a multi-temperature etch process for silicon-containing layers on a substrate holder, using a control circuit with a heater and chiller. However, Kadomura disclosed measuring the wafer temperature directly, not the substrate holder temperature. To supply this missing element, Petitioner pointed to Matsumura, which explicitly taught sensing the substrate holder's temperature. Furthermore, while Kadomura demonstrated rapid temperature changes, Matsumura disclosed using pre-determined, recipe-based control to pre-select the timing and temperature of process steps, satisfying the "preselected time period" limitation. For claim 58, Petitioner asserted that Kadomura's examples all used a chlorine-containing etching gas.
  • Motivation to Combine: A Person of Ordinary Skill in the Art (POSITA) would combine Matsumura's holder temperature sensor and recipe-based control with Kadomura's system to improve process control and efficiency. Integrating Matsumura’s holder sensor would provide more comprehensive data on heat transfer between the chuck and wafer, while its recipe-based control would make Kadomura’s process more precise, predictable, and reliable, thereby increasing throughput.
  • Expectation of Success: Both references operated in the same technical field of semiconductor wafer temperature control for processing, using similar components and addressing similar problems. A POSITA would have reasonably expected that integrating Matsumura's well-known control and sensing features into Kadomura's system would function as intended.

Ground 2: Obviousness of Claim 57 over Kadomura, Matsumura, and Muller

• Prior Art Relied Upon: Kadomura (Patent 6,063,710), Matsumura (Patent 5,151,871), and Muller (Patent 5,605,600).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground builds on the combination of Kadomura and Matsumura to address the limitation of dependent claim 57, which required the temperature change to occur in "less than about 5 percent of the total etching process time." Petitioner asserted that Muller disclosed this feature. Muller taught a two-step etch process where the temperature change of 50°C occurred in "several seconds," while the total etch time was over seven minutes (430 seconds). This ratio (e.g., 10s / 430s ≈ 2.3%) explicitly satisfied the <5% limitation.
  • Motivation to Combine: A POSITA would be motivated to incorporate Muller's rapid, backpressure-based temperature control design into the Kadomura-Matsumura system. The primary goal of all references was to increase throughput and process efficiency. Adopting Muller's more rapid temperature change mechanism was a known way to achieve this goal.
  • Expectation of Success: The references all related to multi-temperature etching. A POSITA would have expected that incorporating Muller's method for rapid temperature transition—a known process variable—into another multi-temperature etching system would predictably shorten the transition time relative to the overall process time.

Ground 3: Obviousness of Claims 56-62 and 71 over Muller, Matsumura, and Wang

• Prior Art Relied Upon: Muller (Patent 5,605,600), Matsumura (Patent 5,151,871), and Wang (Patent 4,992,391).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground presented an alternative primary combination. Petitioner argued Muller taught the foundational multi-temperature etching process, including using an electrostatic chuck and changing temperature between steps. The combination with Matsumura was proposed for the same reasons as in Ground 1: to add the specific teachings of sensing the substrate holder temperature and using pre-programmed recipes for precise time and temperature control, which Muller lacked. Wang was introduced to provide a specific, common wafer structure—a stack with a polysilicon layer over a silicide layer and an oxide etch-stop layer—and associated selective etching methods.
  • Motivation to Combine: A POSITA would combine Muller and Matsumura to achieve more precise and reliable temperature control. It would have been a simple and obvious design choice to then apply this improved multi-temperature etching process to a well-known wafer stack like the one disclosed in Wang. The combination represented the application of a known process to a known workpiece to achieve a predictable result.
  • Expectation of Success: The combination involved integrating well-understood process control systems (Matsumura) with a known etching tool (Muller) and applying it to a standard material stack (Wang). A POSITA would have had a high expectation of success.
• Additional Grounds: Petitioner asserted additional obviousness challenges based on combinations including Kikuchi (Patent 5,226,056) to teach radiant heating (e.g., infrared lamps) as an alternative method for changing substrate temperature, and further combinations with Wang to address claims reciting specific layer stacks and temperature ranges.

4. Arguments Regarding Discretionary Denial

• Petitioner argued that denial was inappropriate because the petition was filed concurrently with a motion for joinder to an already-instituted inter partes review (IPR), Intel Corp. et al. v. Daniel L. Flamm, IPR2017-00282. Petitioner asserted that under the Board’s rules, the one-year time bar of §315(b) does not apply to a petition accompanied by a request for joinder, and that joinder would promote efficiency by allowing the Board to consider identical grounds and evidence in a coordinated proceeding.

5. Relief Requested

• Petitioner requested institution of an IPR and cancellation of claims 56-63 and 70-71 of Patent RE40,264 E as unpatentable.