Samsung Electronics Co Ltd v. Flamm Daniel

1. Case Identification

• Case #: IPR2017-01752
• Patent #: RE40,264
• Filed: July 10, 2017
• Petitioner(s): Samsung Electronics Company, Ltd.
• Patent Owner(s): Daniel L. Flamm
• Challenged Claims: 56-63, 70-71

2. Patent Overview

• Title: Multi-Temperature Processing
• Brief Description: The ’264 patent discloses a method for processing a semiconductor substrate, such as etching a wafer, at two or more different temperatures within a single process chamber. The invention uses a temperature control system with a substrate holder, sensors, and a control circuit to change and maintain substrate temperatures at pre-selected levels for pre-selected time intervals.

3. Grounds for Unpatentability

Ground 1: Obviousness over Kadomura and Matsumura - Claims 56 and 58 are obvious over Kadomura in view of Matsumura.

• Prior Art Relied Upon: Kadomura (Patent 6,063,710) and Matsumura (Patent 5,151,871).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner argued that Kadomura disclosed the core method of independent claim 56: a multi-temperature, two-step process for etching a stack of silicon-containing layers on a substrate holder in a single chamber. Kadomura taught using a control device to change wafer temperature, including heating to above 49°C. To the extent Kadomura did not explicitly teach sensing the substrate holder temperature or using preselected time periods for temperature changes, Petitioner asserted that Matsumura supplied these limitations. Matsumura taught a processing tool with a temperature sensor embedded in the substrate holder and a control system that used "predetermined recipes" to execute precise, pre-programmed temperature and time profiles. For dependent claim 58, Kadomura's examples used a chlorine-containing etching gas.
  • Motivation to Combine: A POSITA would combine Matsumura's more precise recipe-based control and direct holder temperature sensing with Kadomura's multi-temperature etching process. The motivation was to improve process control, reliability, and efficiency by allowing a chipmaker to directly monitor and control the substrate holder temperature, leading to better heat transfer management and increased throughput, a goal explicitly stated in Kadomura.
  • Expectation of Success: Combining a known sensor and a well-understood recipe-based control system with a similar etching process was a predictable application of conventional techniques to achieve improved process control.

Ground 2: Obviousness over Kadomura, Matsumura, and Wang - Claims 59-61 and 71 are obvious over Kadomura and Matsumura in view of Wang.

• Prior Art Relied Upon: Kadomura (Patent 6,063,710), Matsumura (Patent 5,151,871), and Wang (Patent 4,992,391).
• Core Argument for this Ground:
  • Prior Art Mapping: Petitioner asserted that the base combination of Kadomura and Matsumura taught the controlled, multi-temperature etching process as established in Ground 1. Wang was introduced to teach the specific wafer structure recited in the dependent claims: a stack including a polysilicon layer over a silicide layer and an oxide layer. Wang further taught selective etching relative to the oxide layer, which served as an "etch-stop layer." The combination thus taught etching Wang's specific wafer structure using the process of Kadomura and Matsumura.
  • Motivation to Combine: A POSITA would have been motivated to apply the improved, recipe-controlled etching process of the Kadomura-Matsumura combination to the conventional wafer stack disclosed in Wang. This represented a straightforward application of a known process to a known workpiece to achieve the predictable result of etching that workpiece with greater control and efficiency.
  • Expectation of Success: Applying a known etching process to a standard wafer stack configuration would have presented a high likelihood of success, as it involved combining known elements for their intended purposes.

Ground 3: Obviousness over Muller, Matsumura, and Wang - Claims 56-62 and 71 are obvious over Muller and Matsumura in view of Wang.

• Prior Art Relied Upon: Muller (Patent 5,605,600), Matsumura (Patent 5,151,871), and Wang (Patent 4,992,391).
• Core Argument for this Ground:
  • Prior Art Mapping: This ground presented an alternative primary reference, Muller, which taught a method of shaping etch profiles by controlling wafer temperature during a two-step etch process. Muller disclosed using an electrostatic chuck and changing temperature rapidly ("several seconds") by varying the pressure of a gas behind the substrate, as recited in claim 62. Petitioner argued that Matsumura was combinable for the same reasons as before: to add its precise recipe-based control and substrate holder sensor. Wang was again relied upon for its disclosure of a specific polysilicon-over-silicide wafer stack.
  • Motivation to Combine: A POSITA would have been motivated to combine Muller's rapid, backpressure-based temperature control with Matsumura's precise recipe-based programmable controller to achieve even faster and more reliable temperature transitions, thereby improving throughput. Applying this enhanced process to the well-known wafer stack taught by Wang was a logical and predictable design choice to process a standard component.
  • Expectation of Success: The combination involved integrating complementary and well-known technologies from the same field of semiconductor manufacturing, making the outcome highly predictable.
• Additional Grounds: Petitioner asserted additional obviousness challenges based on other combinations of the core references. These grounds primarily relied on adding Muller to the Kadomura/Matsumura system for its teachings on rapid temperature changes to meet the "less than 5 percent" time limitation of claim 57, and adding Kikuchi for its teachings on using infrared lamps for radiative heating to meet the limitations of claim 63.

4. Arguments Regarding Discretionary Denial

• Petitioner argued that discretionary denial was inappropriate because the petition was filed concurrently with a Motion for Joinder to an already-instituted inter partes review (IPR2017-00282). Petitioner asserted that under the Board’s rules and interpretations, the one-year time bar of 35 U.S.C. §315(b) does not apply to a petition accompanied by a request for joinder, thus making the petition timely and proper for consideration on the merits.

5. Relief Requested

• Petitioner requests institution of an inter partes review and cancellation of claims 56-63 and 70-71 of Patent RE40,264 as unpatentable.