PTAB

IPR2018-00094

Samsung Electronics Co Ltd v. Ibex PT Holdings Co Ltd

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Key Events
Petition
petition

1. Case Identification

2. Patent Overview

  • Title: Decoding Motion Information in Merge Mode
  • Brief Description: The ’668 patent relates to video coding technologies, specifically an apparatus and method for decoding motion information in a "merge mode." This mode allows a current block of video data to inherit motion information (e.g., motion vectors, reference picture indices) from neighboring blocks to reduce the amount of data that must be transmitted, thereby improving compression efficiency.

3. Grounds for Unpatentability

Ground 1: Obviousness over HEVC Standard Drafts - Claims 1-3 are obvious over WD4-v2 in view of Lin and Zhou II.

  • Prior Art Relied Upon: WD4-v2 (JCTVC-F803, a working draft of the High-Efficiency Video Coding standard), Lin (Application # 2012/0236942), and Zhou II (JCTVC-F081, a contribution to the HEVC standard).
  • Core Argument for this Ground:
    • Prior Art Mapping: Petitioner argued that the combination of these references teaches every element of the challenged claims.
      • WD4-v2, a working draft of the HEVC standard, was asserted to disclose the bulk of the claimed invention. This includes an apparatus for decoding motion information in merge mode, comprising units for reconstructing a merge predictor index from a codeword, deriving spatial merge candidates from adjacent blocks, generating a list of merge candidates, and selecting a merge predictor from that list to generate the motion information for the current block.
      • Lin, which also relates to HEVC development, was cited to teach that the decoding processes described in standards like HEVC are implemented in hardware, such as on a processor, microprocessor, or Digital Signal Processor (DSP). Petitioner argued this supplies the "apparatus" and programmed "processor" structure for the means-plus-function "unit" terms recited in the claims.
      • Zhou II, another HEVC standards contribution, was introduced to supply a specific limitation Petitioner contended was not explicitly in WD4-v2. Specifically, Zhou II allegedly teaches selecting a temporal merge candidate's motion vector based on the position of the current block relative to a lower boundary of the largest coding unit (LCU). This selection strategy is proposed to minimize memory bandwidth.
    • Motivation to Combine: Petitioner contended a person of ordinary skill in the art (POSITA) would have been motivated to combine these references. A POSITA would obviously implement the video decoding processes of WD4-v2 on a processor as taught by Lin to create a functional apparatus. Furthermore, since WD4-v2 and Zhou II are both contributions to the same HEVC standardization effort, a POSITA developing an HEVC-compliant decoder would look to proposals like Zhou II to improve upon the main working draft (WD4-v2). Specifically, a POSITA would incorporate Zhou II’s method for selecting a temporal merge candidate to achieve the stated goal of reducing memory bandwidth, a known objective in the field.
    • Expectation of Success: A POSITA would have had a reasonable expectation of success in making this combination. The references address the same technical field and were designed to be compatible within the HEVC framework. Combining Zhou II's specific selection logic with WD4-v2's broader merge mode process was presented as a predictable application of a known technique to improve a known system for a predictable result.

4. Key Claim Construction Positions

  • Petitioner argued that multiple claim terms ending in "unit" should be construed as means-plus-function terms under 35 U.S.C. § 112, sixth paragraph, because the term "unit" is a nonce word that fails to recite a sufficiently definite structure.
  • The challenged terms included: "merge predictor index decoding unit," "spatial merge candidate derivation unit," "temporal merge candidate configuration unit," "merge candidate generation unit," "merge predictor selection unit," and "motion information generation unit."
  • Petitioner contended that the specification does not disclose a specific structure (e.g., circuitry) for these units, but rather describes their functions. For the purposes of the IPR, Petitioner proceeded under the construction that the corresponding structure for each "unit" is a processor programmed to implement the specific algorithms disclosed in the '668 patent's specification for performing the recited functions.

5. Key Technical Contentions (Beyond Claim Construction)

  • Petitioner asserted that the challenged claims are not entitled to their claimed priority date from a Korean patent application ([’524](https://ai-lab.exparte.com/case/ptab/IPR2017-00101/doc/1032) KR application).
  • The argument centered on a lack of adequate written description in the priority document for a key limitation in independent claim 1. Specifically, Petitioner argued the ’524 KR application does not disclose or suggest selecting the motion vector of a second merge candidate block when the current block is adjacent to a lower boundary of the largest coding unit.
  • Consequently, Petitioner argued the claims' earliest effective filing date is the filing date of the PCT application (January 20, 2012), not the earlier Korean application filing date (August 29, 2011). This later effective filing date is critical, as it makes WD4-v2 (published August 9, 2011) and Zhou II (published July 11, 2011) valid prior art under pre-AIA §102.

6. Relief Requested

  • Petitioner requested the institution of an inter partes review and the cancellation of claims 1-3 of Patent 9,025,668 as unpatentable under 35 U.S.C. §103.